Semiconductor Layer Protrusion for Misalignment Tolerance
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Solution Overview
Problem
Conventional semiconductor devices face characteristic deteriorations due to misalignment during the process of forming electrodes, which are difficult to sufficiently suppress, leading to issues such as increased line resistance and decreased productivity in liquid crystal display devices.
Innovation Solution
The semiconductor device incorporates a semiconductor layer with protrusions and adjustment portions that protrude outward from the gate electrode, allowing for misalignment tolerance by increasing the overlap area between electrodes and the semiconductor layer, thereby reducing characteristic deteriorations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If the line width is narrowed in the step portion to improve device integration, then manufacturing precision deteriorates due to etching defects and disconnection
Solution Approach 1:
The semiconductor layer is formed to protrude in advance at the step portion before electrode formation, creating a preliminary geometric compensation that prevents etching defects and disconnection issues during subsequent manufacturing processes
Solution Approach 2:
The semiconductor layer is selectively formed with different shapes at different locations: it protrudes at the step portion where electrodes are formed to prevent disconnection, while maintaining appropriate boundaries in other regions to control device characteristics
2Productivity
If the electrode formation process is simplified to improve productivity, then manufacturing precision deteriorates due to misalignment
Solution Approach 1:
The semiconductor layer is pre-formed with protrusions at step portions before electrode deposition, creating a geometric buffer that compensates for misalignment that may occur during subsequent electrode formation processes
Solution Approach 2:
The protruding semiconductor layer acts as a cushion or buffer zone that absorbs the impact of misalignment, ensuring that even if electrodes are not perfectly aligned, the device characteristics remain within acceptable ranges
3Manufacturing precision
If the semiconductor layer boundary is extended outward to improve electrode overlap, then device characteristics deteriorate due to increased OFF current
Solution Approach 1:
The semiconductor layer is selectively positioned: it protrudes locally at step portions to improve electrode overlap and prevent disconnection, while maintaining appropriate boundaries in channel regions to control OFF current and maintain device characteristics
Data Source
AI summary
A semiconductor device (18) includes: a gate electrode (102) formed on a substrate (101); a semiconductor layer (104) formed above the gate electrode (102) and including a source region, a drain region, and a channel region; a source electrode (106) connected to the source region above the semiconductor layer (104); and a drain electrode (107) connected to the drain region above the semiconductor layer (104). The semiconductor layer (104) has, at a portion overlapping the drain electrode (107), a protrusion that protrudes outward along an extending direction of a drain line drawn out from the drain electrode (107). At an outside of the channel region sandwiched between the drain electrode (107) and the source electrode (106), the semiconductor layer (104) has an adjustment portion where an outer boundary of the semiconductor layer (104) is positioned more inward than an outer boundary of the gate electrode (102).