Semiconductor Layer Structure for Low-Loss Switching and Breakdown Resistance
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Solution Overview
Problem
Semiconductor devices in power conversion systems face challenges in minimizing switching loss while maintaining high breakdown resistance, particularly due to issues with hole injection control and thermal diffusion affecting the conductivity type impurity distribution.
Innovation Solution
The semiconductor device incorporates a semiconductor part with multiple third electrodes and insulating films, where the third semiconductor layer has a higher impurity concentration than the second semiconductor layer, and trench structures are used to control hole injection and prevent thermal diffusion, optimizing the area ratio of third and second semiconductor layers to balance switching loss and breakdown resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If the area ratio of the third semiconductor layer to the second semiconductor layer is increased to reduce switching loss, then switching loss decreases, but breakdown resistance deteriorates
Solution Approach 1:
The patent applies local quality by creating a non-uniform impurity concentration distribution within the third semiconductor layer. The impurity concentration is set to be higher near the second electrode and lower near the first electrode, forming a gradient structure. This allows the region near the second electrode to contribute more to reducing switching loss through enhanced hole injection, while the region near the first electrode maintains lower impurity concentration to preserve breakdown resistance. The local variation in impurity concentration optimizes both contradictory requirements simultaneously.
2Ease of manufacture
If conventional uniform impurity distribution is used in the third semiconductor layer, then manufacturing is simpler, but hole injection control and breakdown resistance are insufficient
Solution Approach 1:
The patent applies parameter changes by systematically varying the impurity concentration parameter throughout the third semiconductor layer. Instead of using a uniform concentration, the impurity concentration is changed as a function of position, with higher concentrations near the second electrode and lower concentrations near the first electrode. This parameter variation enables precise control over hole injection characteristics and electric field distribution, achieving superior breakdown resistance and switching performance compared to uniform distributions.
3Ease of manufacture
If thermal diffusion is allowed during manufacturing, then manufacturing process is simpler, but impurity distribution control and device performance deteriorate
Solution Approach 1:
The patent applies preliminary anti-action by implementing preventive measures against thermal diffusion before it can degrade the impurity distribution. This is achieved by carefully controlling and limiting the thermal processing conditions during manufacturing, using lower temperatures and shorter durations that are sufficient for other manufacturing steps but insufficient to cause significant impurity diffusion. This preliminary protection preserves the precisely engineered impurity concentration gradient, maintaining both manufacturing feasibility and device performance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively reduces switching loss and enhances breakdown resistance by controlling hole injection and preventing thermal diffusion, thereby improving the performance of semiconductor devices in power conversion systems.
Implementation Method 1
controlling hole injection and preventing thermal diffusion
Implementation Method 2
electrically insulated from the semiconductor part by a first insulating film
Implementation Method 3
trench structures are used to control hole injection and prevent thermal diffusion
Data Source
Figure 1~2
Figure 3A~3C
Figure 4A~4B
AI summary
A semiconductor device (1-7a) includes a semiconductor part (10), first and second electrodes (20, 30), and first-third and second-third electrodes (40a, 40b). The semiconductor part (10) is provided between the first and second electrodes (20, 30). The semiconductor part (10) includes a first semiconductor layer (11) of a first conductivity type, second and third semiconductor layers (13, 15) of a second conductivity type. The second and third semiconductor layers (13, 15) are arranged between the first semiconductor layer (11) and the second electrode (30). The first-third and second-third electrodes (40a, 40b) are provided in the semiconductor part. The second semiconductor layer is provided between the first-third electrode (40a) and the second-third electrode (40b). The second electrode (30) includes a contact portion (30c) extending into the second semiconductor layer (13). The third semiconductor layer (15) is provided on the second semiconductor layer (13) between the contact portion (30c) and the second-third electrode (40b). The second semiconductor layer (13) includes a first portion (13a) facing the third semiconductor layer (15) via the contact portion (30c).