Database Pattern Matching for Semiconductor Layout Defect Detection
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing semiconductor manufacturing techniques fail to accurately and quickly identify manufacturing problem areas, particularly due to complex interactions between nonadjacent polygons, leading to reduced yield and performance issues.
Innovation Solution
A model-based approach using a pattern matching database to analyze layout samples and simulate manufacturing problems, capturing effects beyond neighboring polygons, and storing proximity corrections for rapid identification and correction of manufacturing issues.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If design freedom is increased to allow more design options, then design team flexibility is improved, but the risk of manufacturing problems and yield reduction worsens
Solution Approach 1:
The patent implements a feedback mechanism where the system continuously monitors layout patterns against manufacturing capabilities. When potential manufacturing problems are detected in designs with increased freedom, the system provides feedback to guide design modifications, allowing designers to maintain flexibility while avoiding yield-reducing configurations.
Solution Approach 2:
The patent performs preliminary analysis of design patterns against manufacturing limitations before finalization. By identifying potential manufacturing problems early in the design process, the system allows designers to adjust layouts proactively, maintaining design freedom while preventing manufacturing issues from developing.
2Measurement precision
If comprehensive pattern analysis is performed to identify all manufacturing problems, then manufacturing problem detection accuracy is improved, but the analysis time and computational resources worsen
Solution Approach 1:
The patent applies partial analysis to most regions and excessive (comprehensive) analysis only to critical areas where manufacturing problems are most likely to occur. This selective approach maintains high detection accuracy for problematic patterns while reducing overall analysis time by avoiding exhaustive examination of all layout regions.
Solution Approach 2:
The patent implements variable analysis depth based on local layout characteristics. Regions with complex polygon interactions or proximity to known problem areas receive deeper analysis, while simple regions receive lighter analysis. This local quality approach optimizes the balance between detection accuracy and computational efficiency.
Data Source
AI summary
One embodiment provides a system for using a database to quickly identify a manufacturing problem area in a layout. During operation, the system receives a first check-figure which identifies a first area in a first layout, wherein the first area is associated with a first feature. Next, the system determines a first sample using the first check-figure, wherein the first sample represents the first layout's geometry within a first ambit of the first check-figure, wherein the first sample's geometry is expected to affect the shape of the first feature. The system then performs a model-based simulation using the first sample to obtain a first simulation-result which indicates whether the first feature is expected to have manufacturing problems. Next, the system stores the first simulation-result in a database which is used to quickly determine whether a second feature is expected to have manufacturing problems.