Semiconductor Layout Alignment Using Edge- and Corner-Based Learning

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Solution Overview

Problem

The increasing complexity of semiconductor manufacturing processes leads to various defects, necessitating improved methods for layout modification and alignment of source information to enhance manufacturing accuracy and efficiency.

Innovation Solution

An electronic device utilizing machine learning to emphasize and align edges and corners of layout and captured images, generating modified layout images for semiconductor manufacturing, and incorporating a machine learning-based modification module to optimize process parameters.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Extent of automation

If machine learning is applied to modify the layout, then layout modification can be automated, but a great amount of source information is required for learning

Engineering Contradiction:
Improvelayout modification automationVSAvoidsource information quantity
Core Design Contradiction:
Extent of automationVSQuantity of substance

Solution Approach 1:

The patent extracts and emphasizes only the critical features (edges and corners) from the layout images for machine learning training, rather than using the complete layout images. This extraction reduces the quantity of source information required while maintaining the automation capability for layout modification.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent creates simplified copies of layout images by extracting only the essential edge and corner features. These simplified copies serve as the source information for machine learning, reducing the data quantity needed while preserving the essential information for automated layout modification.

Inventive Principle:
Principle #26Copying

2Measurement precision

If a great amount of source information is aligned for machine learning, then learning accuracy improves, but the time and computational resources required increase

Engineering Contradiction:
Improvelearning accuracyVSAvoidalignment time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent extracts only the essential edge and corner features from layout images for alignment and machine learning training. This extraction maintains learning accuracy by preserving critical geometric information while dramatically reducing the time and computational resources required for alignment operations.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent applies different processing quality to different parts of the layout image: edges and corners are extracted with high precision for alignment, while other areas are processed more simply. This local quality approach maintains learning accuracy for critical features while reducing overall processing time.

Inventive Principle:
Principle #3Local quality

3Manufacturing precision

If edges and corners are emphasized and aligned, then alignment accuracy improves, but the processing complexity increases

Engineering Contradiction:
Improvealignment accuracyVSAvoidprocessing complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent extracts only edges and corners from layout images for alignment processing. This extraction improves alignment accuracy by focusing on the most critical geometric features while actually reducing processing complexity compared to aligning entire images, as fewer pixels and features need to be processed.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent segments the layout image processing into distinct stages: edge detection, corner detection, and alignment. This segmentation makes the processing more manageable and less complex by breaking down the overall task into smaller, more efficient sub-tasks that can be executed sequentially.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS12469195B2Electronic device supporting manufacture of semiconductor device and operating method of electronic device
Publication Date: 2025.11.11 SAMSUNG ELECTRONICS CO LTD
  • US12469195B2 patent drawing
  • US12469195B2 patent drawing
  • US12469195B2 patent drawing

AI summary

Disclosed is an operating method of an electronic device which includes a processor and supports manufacture of a semiconductor device. The operating method includes receiving, at the processor, a layout image for the manufacture of the semiconductor device and a captured image generated by capturing the semiconductor device actually manufactured, aligning, at the processor, the layout image and the captured image based on a result of emphasizing edges and corners of the layout image and the captured image, and performing, at the processor, learning based on the aligned layout image and the aligned captured image such that a first modified layout image is generated from the layout image, and the semiconductor device is manufactured based on a second modified layout image generated from the layout image.