Semiconductor Chip Layout Correction via Machine Learning Defect Prediction
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Solution Overview
Problem
Semiconductor chip manufacturing processes face defects due to optical proximity and loading effects during exposure and etching, leading to process errors despite compliance with design rules, which can be compensated by predicting and correcting layout patterns.
Innovation Solution
A layout method for semiconductor chips using machine learning models to predict defects by generating aerial and SEM images, comparing them to target images, and correcting the layout before manufacturing, incorporating optical proximity correction to mitigate errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional photolithography and etching processes are used to form circuit patterns, then manufacturing process is straightforward, but process errors occur due to optical proximity effect and loading effect leading to defects
Solution Approach 1:
The patent applies preliminary action by predicting defects using machine learning models before the actual manufacturing process. The system generates aerial images from layout patterns, predicts SEM images, identifies potential defects, and corrects layout patterns in advance, preventing defects before they occur during photolithography and etching processes
Solution Approach 2:
The patent implements feedback by using machine learning models to predict the actual manufactured pattern (SEM image) based on the layout pattern, comparing it with the target pattern, and using this information to iteratively correct the layout pattern. This closed-loop feedback system continuously improves pattern accuracy by learning from predicted manufacturing outcomes
2Manufacturing precision
If layout pattern correction is performed to compensate for process errors, then manufacturing precision improves, but layout design time and complexity increase
Solution Approach 1:
The patent replaces manual or traditional iterative layout correction methods with an automated machine learning-based prediction and correction system. The ML models automatically predict manufacturing outcomes and suggest corrections, eliminating the need for time-consuming manual layout adjustments while improving precision
Solution Approach 2:
The patent changes the approach to layout correction by using machine learning parameter optimization instead of traditional manual adjustment. The system learns optimal correction parameters from training data and applies them automatically to predict and correct layout patterns, significantly reducing design time while maintaining high precision
Data Source
AI summary
A layout method for a semiconductor chip includes designing a layout; generating an aerial image based on the layout; determining a predicted scanning electron microscope (SEM) image based on the aerial image using a first machine learning model; determining a target SEM image based on the layout using a second machine learning model; predicting a defect in the semiconductor chip based on a result of comparing the predicted SEM image with the target SEM image; and correcting the layout based on the predicted defect.