Semiconductor device
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Solution Overview
Problem
Semiconductor devices with high-voltage and low-voltage switching elements experience surge voltage issues due to inductance components in the connection path, particularly when capacitors are connected between input-side terminals, exacerbating the problem at higher switching speeds.
Innovation Solution
A semiconductor device design featuring switching elements connected in series with a capacitor in parallel, where the capacitor overlaps with the switching elements to reduce inductance components and suppress surge voltage, utilizing a configuration that minimizes the distance between the capacitor and switching elements to reduce inductance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a capacitor is connected between input-side terminals to improve power supply stability, then power supply stability is improved, but inductance components in the connection path generate surge voltage especially at higher switching speeds
Solution Approach 1:
The patent transitions from a planar connection layout to a three-dimensional overlapping structure. The capacitor is positioned to overlap with the switching element in the vertical dimension (thickness direction), creating a spatial relationship that minimizes the connection path length and inductance while maintaining electrical functionality.
Solution Approach 2:
The capacitor serves multiple functions: it provides power supply stabilization, acts as an electromagnetic shield between the high-voltage switching element and low-voltage components, and minimizes inductance through its overlapping position. This multi-functionality addresses both the power supply stability requirement and the surge voltage suppression need.
2Productivity
If switching speed is increased to improve productivity, then productivity is improved, but surge voltage increases due to inductance components
Solution Approach 1:
By positioning the capacitor to overlap with the switching element in the vertical dimension, the connection path length is minimized. This three-dimensional arrangement reduces inductance effects that would otherwise amplify surge voltage at high switching speeds, enabling faster switching without proportionally increasing surge voltage.
3Object-affected harmful factors
If the capacitor is positioned closer to the switching element to reduce inductance, then inductance components are reduced, but device complexity increases
Solution Approach 1:
The overlapping positioning in the vertical dimension achieves minimal inductance without requiring complex lateral routing or additional connection structures. This straightforward vertical arrangement simplifies the overall device layout while effectively minimizing the connection path and inductance.
Solution Approach 2:
The capacitor structure is integrated with the switching element structure through overlapping positioning, combining multiple functional elements into a compact arrangement. This merging reduces the need for separate connection paths and minimizes inductance while maintaining device simplicity.
Data Source
AI summary
Semiconductor device A1 includes: first terminal 201A and second terminal 201B; first switching element 1A including first gate electrode 12A, first source electrode 13A and first drain electrode 14A; and second switching element 1B including second gate electrode 12B, second source electrode 13B and second drain electrode 14B. First switching element 1A and second switching element 1B are connected in series to each other between first terminal 201A and second terminal 201B. Semiconductor device A1 includes first capacitor 3A connected in parallel to first switching element 1A and second switching element 1B between first terminal 201A and second terminal 201B. First switching element 1A and second switching element 1B are aligned in y direction. First capacitor 3A overlaps with at least one of first switching element 1A and second switching element 1B as viewed in z direction. These arrangements serve to suppress surge voltage.