Semiconductor Device Layout for Threshold Voltage Control
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Solution Overview
Problem
The dispersion of impurity density in semiconductor device manufacturing leads to variations in threshold voltages of transistors, affecting the performance of sense amplifiers in dynamic random-access memories, causing failures in reading data and increasing manufacturing costs due to the need for precise control and larger layout areas.
Innovation Solution
The solution involves forming sensitive PMOS transistors, which require high-precision threshold voltage control, in regions with uniform impurity density away from the well boundaries, while non-sensitive transistors are placed closer to the boundaries, allowing for reduced dispersion of threshold voltages and efficient use of layout space.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If sensitive elements are placed in regions with uniform impurity density away from well boundaries, then threshold voltage control precision is improved, but layout area increases
Solution Approach 1:
The patent applies local quality by creating different impurity density regions within the same well structure. Sensitive elements are specifically placed in regions with uniform impurity density (away from boundaries) while non-sensitive elements are placed in boundary regions. This spatial differentiation of local properties allows threshold voltage control for sensitive elements without requiring the entire device to occupy larger area.
Solution Approach 2:
The patent transitions from a one-dimensional consideration (uniform vs. non-uniform impurity density) to a two-dimensional spatial arrangement by strategically positioning elements at different locations within the well. This dimensional approach allows simultaneous optimization of threshold voltage control and area utilization by exploiting the spatial distribution of impurity density regions.
2Area of stationary object
If non-sensitive elements are placed in boundary regions with non-uniform impurity density, then layout area is reduced, but threshold voltage control precision deteriorates
Solution Approach 1:
The patent applies local quality by creating different impurity density regions within the same well structure. Sensitive elements are specifically placed in regions with uniform impurity density (away from boundaries) while non-sensitive elements are placed in boundary regions. This spatial differentiation of local properties allows threshold voltage control for sensitive elements without requiring the entire device to occupy larger area.
3Reliability
If impurity density dispersion is not controlled, then manufacturing cost increases due to failed devices, but precise control requires larger layout areas
Solution Approach 1:
The patent applies local quality by creating different impurity density regions within the same well structure. Sensitive elements are specifically placed in regions with uniform impurity density (away from boundaries) while non-sensitive elements are placed in boundary regions. This spatial differentiation of local properties allows threshold voltage control for sensitive elements without requiring the entire device to occupy larger area.
Data Source
AI summary
A semiconductor device includes a memory cell, a bit line coupled to the memory cell, first and second wells arranged adjacently to each other, the first and second wells being different in conductivity type from each other and defining a boundary therebetween, first and second transistors formed in the first and second wells, respectively, and being different in channel type from each other, gate electrodes of the first and second transistors being connected in common to the bit line, and a third transistor formed in the first well such that the third transistor is sandwiched between the boundary and the first transistor, and a gate of the third transistor being supplied with a bit line precharge signal.