Semiconductor Element Layout for Compact Wire-Bonded Packaging
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Solution Overview
Problem
Existing semiconductor devices face challenges in reducing dead spaces on circuit substrates, particularly in configurations where semiconductor elements and signal terminals are arranged side by side, leading to inefficiencies in layout and potential reliability issues due to longer bonding wire lengths and steeper angles.
Innovation Solution
The semiconductor device design includes semiconductor elements with pads offset to the periphery of corner portions, arranged in a manner that reduces the length of the pad arrangement region, allowing for a 90-degree rotation of one element relative to the other, which shortens the pad arrangement regions and signal terminal regions on the circuit substrate, thereby minimizing dead spaces.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If semiconductor elements and signal terminals are arranged side by side in a conventional layout, then the device structure is simple, but dead spaces on the circuit substrate increase and bonding wire lengths become excessive
Solution Approach 1:
The patent applies asymmetry by rotating one semiconductor element 90 degrees relative to the other, creating an asymmetric layout that optimizes space utilization. This rotation allows the pad arrangement regions to be positioned more efficiently, reducing dead spaces on the circuit substrate while maintaining structural integrity and electrical connectivity.
Solution Approach 2:
The patent transitions from a conventional linear side-by-side arrangement to a two-dimensional optimized layout by rotating one element 90 degrees. This dimensional repositioning allows pads to be arranged in a more compact configuration, reducing the pad arrangement region length and minimizing dead spaces on the substrate surface.
2Reliability
If bonding wires connect pads and signal terminals with conventional arrangement, then connectivity is established, but wire length variations and steep angles reduce reliability
Solution Approach 1:
The asymmetric rotation of one semiconductor element optimizes the geometric relationship between pads and signal terminals, creating more favorable bonding wire routing paths. This reduces wire length variations and decreases the steepness of wire angles, thereby improving bonding reliability and reducing the risk of wire failure.
Solution Approach 2:
The rotated arrangement enables bonding wires to follow more gradual, curved paths between pads and signal terminals rather than steep angular connections. This curvature optimization reduces mechanical stress on the wires and improves reliability by minimizing sharp bends and excessive tension.
3Volume of moving object
If pad arrangement region is long in conventional layout, then all pads can be connected, but the overall device size increases and compactness is reduced
Solution Approach 1:
By rotating one semiconductor element 90 degrees, the patent repositions pads in a two-dimensional configuration that reduces the linear length of the pad arrangement region. This allows all necessary pad connections to be achieved within a more compact footprint, reducing overall device size while maintaining full functionality.
Solution Approach 2:
The rotated arrangement allows overlapping or adjacent positioning of pad regions from different semiconductor elements, effectively merging their spatial footprints. This consolidation reduces the total length of the pad arrangement region and improves device compactness without compromising electrical connectivity.
Data Source
AI summary
In a semiconductor device, a plurality of semiconductor elements includes a first element and a second element arranged in a first direction perpendicular to a plate thickness direction. The first element and the second element each have a rectangular shape having four corner portions and four side portions. The first element and the second element have structures common to each other, in which pads are offset to a periphery of a first corner portion between a first side portion and a second side portion. The first element is disposed so that the first side portion faces signal terminals in a second direction, and the second side portion faces the second element in the first direction. The second element is disposed so that the second side portion faces the signal terminals in the second direction and the first side portion faces the first element in the first direction.