Semiconductor Circuit LC Resonance Synchronization
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Solution Overview
Problem
In clock distribution circuits using LC resonance circuits, synchronizing pulse control with the resonance period is challenging due to difficulties in detecting peak currents with small resonance amplitudes, requiring lengthy measurement times with DLL circuits.
Innovation Solution
A semiconductor circuit apparatus with a control circuit, drive circuit, series connection circuit, and level detection circuit, where the level detection circuit detects an intermediate transition point of LC resonance, allowing synchronization without peak current detection, using a comparator and synchronous delay circuit for feedback.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a DLL circuit is used to detect peak current with very small resonance amplitude, then detection accuracy is improved, but measurement time increases significantly
Solution Approach 1:
The patent extracts the detection function from peak current measurement to intermediate level detection. By monitoring the intermediate voltage level during LC resonance instead of measuring peak current directly, the system achieves accurate timing information without the lengthy measurement times required by DLL circuits.
Solution Approach 2:
The patent introduces an intermediate level detection mechanism as a mediator between the LC resonance circuit and the control system. This intermediary approach uses voltage level monitoring at an intermediate point in the resonance circuit to provide timing signals, avoiding the need for direct peak current measurement and subsequent complex processing.
2Productivity
If pulse control timing is synchronized with LC resonance period, then clock distribution efficiency is improved, but detection complexity increases due to small resonance amplitude
Solution Approach 1:
The patent applies local quality by monitoring a specific intermediate voltage level within the LC resonance circuit rather than attempting to measure the overall peak current. This localized measurement approach reduces detection difficulty while maintaining the ability to synchronize pulse control timing with the resonance period for efficient clock distribution.
Solution Approach 2:
The patent replaces the mechanical/physical measurement of peak current with an electrical voltage level detection method. By substituting current measurement with voltage monitoring at an intermediate point, the system simplifies the detection process while achieving the same timing synchronization function.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables timely synchronization of pulse control with the LC resonance period, reducing measurement time and improving efficiency in clock distribution circuits.
Implementation Method 1
an LC resonance circuit that causes intermittent resonance under pulse control
Data Source
AI summary
A semiconductor circuit apparatus of the present disclosure includes a control circuit controlling a clock signal externally input, a drive circuit performing a switching operation according to a pulse signal provided by the control circuit, a series connection circuit including an inductor element, a switch element, and a capacitive element connected in series between a signal line and a fixed potential node, the series connection circuit forming an LC resonance circuit, and a level detection circuit having an input end connected to the signal line. An output from the level detection circuit is fed back to the control circuit.