Semiconductor Device Lead Frame Segmentation for Balanced Mounting
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Solution Overview
Problem
Conventional semiconductor devices face issues with balance during mounting on circuit boards, design flexibility, cooling performance, and manufacturing costs due to the arrangement of semiconductor chips and lead frames, leading to overhang, increased width, and complex die structures.
Innovation Solution
The semiconductor device is structured with semiconductor chips divided into two groups mounted on opposite sides of the lead frame, each covered by separate resin-seal portions, with lead terminals drawn out between these portions, allowing for balanced mounting, design flexibility, and improved cooling by reducing the number of chips in one resin-seal portion.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If all leads are arranged on one side of the lead frame, then the device structure is simplified, but the semiconductor device becomes ill-balanced and overhangs when mounted on a circuit board
Solution Approach 1:
The patent divides the leads into two separate groups: first leads arranged on one side of the lead frame and second leads arranged on the other side. This segmentation allows the semiconductor device to be mounted in a well-balanced state on the circuit board, preventing overhang while maintaining structural simplicity through the systematic arrangement of lead groups.
2Stability of the object's composition
If leads are arranged on both sides of the lead frame, then mounting balance is improved, but the width of the resin-seal portion increases
Solution Approach 1:
The patent applies local quality by arranging first leads and second leads on opposite sides of the lead frame, with each lead group serving its specific function. The first leads connect to first semiconductor chips and the second leads connect to second semiconductor chips, allowing the resin-seal portion width to be optimized for each local area rather than requiring uniform width across the entire device.
3Device complexity
If multiple semiconductor chips are covered by a single resin-seal portion, then the device structure is simplified, but the cooling performance deteriorates due to heat accumulation
Solution Approach 1:
The patent segments the sealing structure into first resin-seal portions and second resin-seal portions, where each resin-seal portion covers a specific semiconductor chip or group of chips. This segmentation improves cooling performance by allowing heat to dissipate from each chip individually rather than accumulating under a single large resin-seal portion, while maintaining overall structural simplicity through the modular sealing approach.
4Stability of the object's composition
If the lead frame structure is made complex to achieve balanced mounting, then mounting balance is improved, but manufacturing costs increase due to complex die structures
Solution Approach 1:
The patent achieves mounting balance through segmentation of leads into two simple groups arranged on opposite sides of the lead frame, rather than requiring a complex overall structure. This segmented approach allows each lead group to be manufactured using straightforward die structures, reducing manufacturing costs while still achieving the desired mounting balance on the circuit board.
Data Source
AI summary
A semiconductor device having a plurality of semiconductor chips mounted on a lead frame (10) and required portions covered with seal portions in which: the plurality of semiconductor chips are divided into a first group of semiconductor chips (Dx to Dz) and a second group of semiconductor chips (Du to Dw and Thx to Thz); both groups of semiconductor chips are mounted on the lead frame (10) at a distance from each other; the seal portions are comprised of first and second resin-seal portions (41 and 42) which cover the first and second groups of semiconductor chips, respectively, along with required portions of the lead frame; both resin-seal portions are mechanically coupled with each other by coupling portions; and a group of read terminals respectively connected to circuits within the first resin-seal portion and circuits within the second resin-seal portion are led out through a gap between the first resin-seal portion (41) and the second resin-seal portion (42).