Semiconductor Device Lead Configuration for Uniform Current Density
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Solution Overview
Problem
Existing semiconductor devices experience uneven current density due to the configuration of leads and conductive members, which affects the uniformity of current distribution in semiconductor elements.
Innovation Solution
A semiconductor device configuration where a semiconductor element is mounted on a die pad with leads arranged in a specific manner, allowing the main electrode pad to be connected to one lead and the control electrode pad to another, using conductive members that are parallel and orthogonal to each other, ensuring uniform current distribution.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the main electrode pad is connected to the second lead by way of a plurality of first conductive members and the control electrode pad is connected to the third lead by way of a second conductive member, then the semiconductor element can be electrically connected to the leads, but the current density becomes uneven due to the asymmetric arrangement of leads and conductive members
Solution Approach 1:
The patent applies asymmetry by strategically positioning the main electrode pad and control electrode pad on different lateral surfaces of the semiconductor element. The main electrode pad is located on the first lateral surface side while the control electrode pad is located on the third lateral surface side, creating an asymmetric current distribution path that compensates for the asymmetric lead arrangement and achieves uniform current density
Solution Approach 2:
The patent utilizes the three-dimensional structure of the semiconductor element by placing electrode pads on different lateral surfaces (first and third lateral surfaces) rather than on the same surface. This spatial distribution across multiple dimensions allows for optimized current paths from differently positioned leads, resolving the current density uniformity issue
2Device complexity
If the first lead is integrally connected to the die pad and the second and third leads are arranged laterally away from the first lead, then the leads can be structurally simplified, but the inductance increases due to the lateral separation of leads
Solution Approach 1:
The patent applies local quality by making the first lead integrally connected to the die pad, providing a low-inductance path for the main current flow at the critical location where high current passes through. The integral connection ensures minimal resistance and inductance for the primary current path while allowing other leads to be separately arranged
Data Source
AI summary
A semiconductor device includes a die pad, and a first lead integrally connected to the die pad. A second lead is arranged laterally away from the first lead. A third lead is arranged laterally away from the first lead. A semiconductor element including a first lateral surface and a second lateral surface adjacent to each other, and a third lateral surface adjacent to the second lateral surface is mounted on the die pad such that the first lateral surface faces an end of the second lead and such that the second lateral surface faces an end of the third lead. A main electrode pad and a control electrode pad are provided. First conductive members electrically connect the main electrode pad to the end of the second lead. A second conductive member connects the control electrode pad to the end of the third lead.