Semiconductor Lead Routing for Wire Contact Prevention
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Solution Overview
Problem
In semiconductor devices, the close proximity of wires increases the likelihood of wire-to-wire contact, which can lead to reduced reliability and increased fabrication costs due to errors and adhesion failures during bonding.
Innovation Solution
The semiconductor device design includes leads with opposing portions that extend along different directions, with semiconductor chips positioned between them, and an insulating member to prevent wire contact, allowing for separated and non-intersecting wiring configurations that support high current flow and reduced fabrication costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If wires are disposed close to one another to reduce device size, then device area is reduced, but the probability of wire contact increases
Solution Approach 1:
The patent transitions from planar wire routing to three-dimensional routing by having wires extend in different directions (first direction and second direction) and utilizing vertical separation through lead portions extending in a third direction. This dimensional change allows wires to be spatially separated while maintaining compact device area.
Solution Approach 2:
The lead structure is divided into multiple portions (first portion, second portion, third portion) with wires connected to different segments. This segmentation allows independent routing paths for different wires, reducing the probability of contact while maintaining compact dimensions.
2Reliability
If wiring configuration is made complex to prevent wire contact, then reliability is improved, but device complexity increases
Solution Approach 1:
The patent employs asymmetric wire routing where different wires extend in different directions (first direction vs. second direction) rather than symmetric parallel routing. This asymmetric configuration naturally prevents wire intersection while maintaining simplicity in the overall lead structure design.
3Adaptability or versatility
If more semiconductor chips are disposed to increase functionality, then device capability is improved, but wire intersection probability increases
Solution Approach 1:
The patent utilizes three-dimensional space for wire routing with leads extending in multiple directions (first, second, and third directions). This allows multiple semiconductor chips to be connected without wire intersections by routing wires through different spatial dimensions rather than competing in the same plane.
Data Source
AI summary
A semiconductor device includes at least one semiconductor chip, a first lead, and a second lead. The first lead includes a first portion connected to the semiconductor chip via a first wiring. The second lead includes a first portion connected to the semiconductor chip via a second wiring. The first portion of the first lead and the first portion of the second lead extend along a first direction. The first portion of the first lead is disposed so as to oppose the first portion of the second lead. The semiconductor chip is disposed between the first portion of the first lead and the first portion of the second lead.