Semiconductor Leadframe Segmentation for High Current
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Solution Overview
Problem
Current semiconductor device packages face limitations in high current performance due to pins designed for signal transmission not being optimized for high current paths, leading to inflexibility in chip design and inadequate heat dissipation.
Innovation Solution
A semiconductor device design featuring two leadframes, where one leadframe is optimized for signal transmission and the other for high current paths, with the latter made of thicker metal to enhance thermal power dissipation and current carrying capability, allowing both high current and low current signals to be transmitted simultaneously.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a single leadframe is used for both signal transmission and high current paths, then device complexity is reduced, but high current performance is limited due to pins not being optimized for high current paths
Solution Approach 1:
The patent divides the leadframe into two separate leadframes: a first leadframe optimized for signal transmission and a second leadframe optimized for high current paths. This segmentation allows each leadframe to be specifically designed for its intended function, with the second leadframe using thicker metal to handle high currents, thereby resolving the contradiction between maintaining simple device structure and achieving high current performance.
2Reliability
If pins are designed for signal transmission, then signal integrity is maintained, but high current capability is limited
Solution Approach 1:
The patent creates separate leadframes for signal and high current functions. The first leadframe maintains optimized signal transmission paths with appropriate pin design, while the second leadframe provides thick metal construction specifically for high current capability, eliminating the compromise that would be required in a single leadframe design.
3Reliability
If multiple bond wire solutions are used to increase current capacity, then current handling is improved, but device size increases
Solution Approach 1:
The patent changes the physical parameter of the leadframe metal thickness in the second leadframe to handle high currents. By using thicker metal in the second leadframe, the device achieves high current handling capability without requiring multiple bond wire solutions that would increase device volume, thus resolving the contradiction between current handling and compact size.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enables increased high current performance and compact device design by separating signal and high current paths, improving thermal management and current handling capabilities while maintaining signal transmission.
Implementation Method 1
The die pad of the first leadframe acts as a heatsink to conduct heat away from the die
Implementation Method 2
The second leadframe is made of thicker metal than the first leadframe and can be used to increase thermal power dissipation
Implementation Method 3
The central portion of the first leadframe should be bonded to the second surface of the die and the peripheral portion of the first leadframe bonded to the first surface of the die by a plurality of bond wires
Data Source
AI summary
A semiconductor device comprises a die having a first surface and a second surface, a first leadframe connected to the first surface and the second surface, and a second leadframe connected to the first surface.


