Semiconductor Device With Localized Impurity Region For Leakage Control
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Solution Overview
Problem
Conventional Schottky barrier diodes face challenges in suppressing leakage current and achieving high surge withstand capacity due to the concentration of electric fields at semiconductor surfaces, leading to potential breakdown and damage under reverse and forward surge voltages.
Innovation Solution
The semiconductor device incorporates a structure with n+-type and n−-type semiconductor regions, p-type and p+-type semiconductor regions, and metal layers arranged in a specific configuration, forming Schottky barrier diodes and p-n diodes that redistribute the electric field and enhance current and voltage surge withstand capacities by controlling impurity concentrations and metal layer arrangements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a Schottky barrier diode structure is used, then switching speed is high and forward voltage drop is low, but leakage current increases due to electric field concentration at the semiconductor surface
Solution Approach 1:
The patent introduces a third semiconductor region with higher impurity concentration than the first semiconductor region. This creates a localized change in electrical properties at the junction between the first and second semiconductor regions, modifying the electric field distribution specifically at the surface where leakage current occurs, while preserving the overall Schottky barrier diode structure and its high switching speed characteristics
Solution Approach 2:
The patent changes the impurity concentration parameter by introducing a third semiconductor region with higher impurity concentration than the first semiconductor region. This parameter change modifies the electric field distribution and depletion layer characteristics, suppressing leakage current while maintaining the low forward voltage drop and high switching speed of the Schottky barrier diode
2Strength
If reverse bias voltage is increased to improve voltage handling, then surge withstand capacity improves, but punch-through occurs between depletion layers causing breakdown
Solution Approach 1:
The patent introduces a third semiconductor region with higher impurity concentration located between the first and second semiconductor regions. This localized modification creates a more favorable electric field distribution at critical junction points, preventing punch-through breakdown between depletion layers when reverse bias voltage is increased, thereby enabling higher surge withstand capacity without compromising breakdown resistance
Solution Approach 2:
The third semiconductor region with higher impurity concentration acts as a preventive measure against punch-through breakdown. By having this region in place before reverse bias voltage is applied, the electric field distribution is preemptively optimized to prevent depletion layer penetration, cushioning against potential breakdown and enabling safer operation at higher reverse voltages
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively suppresses leakage current and ensures high surge withstand capacity by redirecting electric fields and optimizing breakdown voltages, preventing terminal part damage and improving overall semiconductor device reliability.
Implementation Method 1
A Schottky barrier diode (SBD) is known in which a metal and a semiconductor have a junction
Implementation Method 2
a depletion layer spreads from the semiconductor surface between the n-layer and a p-layer buried in a portion of the n-layer
Implementation Method 3
the electric field due to the charge (e.g., electrons) is highest at the interface between the metal and the semiconductor
Implementation Method 4
When a reverse bias voltage becomes high, punch-through occurs between the depletion layers of the p-layers
Data Source
AI summary
A semiconductor device includes a first electrode, a first semiconductor region connected to the first electrode and being of a first conductivity type, a second semiconductor region provided on the first semiconductor region, contacting the first semiconductor region and being of a second conductivity type, first metal layers and second metal layers provided on the second semiconductor region and contacting the second semiconductor region, a third semiconductor region provided between the first semiconductor region and the first metal layer, and a second electrode. The third semiconductor region contacts the first and second semiconductor regions and being of the first conductivity type. An impurity concentration of the third semiconductor region is greater than an impurity concentration of the first semiconductor region. The second electrode contacts the first semiconductor region, the second semiconductor region, the first metal layers, and the second metal layers.