3D Semiconductor LED Structure for Crystal Defect Reduction
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional semiconductor LEDs with three-dimensional light-emitting stack structures suffer from crystal defects at the apex and valley of pyramid-shaped structures, leading to non-uniform light emission and reduced efficiency, which is difficult to prevent due to the small thickness of these features.
Innovation Solution
A semiconductor LED with a conductive substrate having a three-dimensional top surface, featuring a light-emitting stack structure with an n-type and p-type nitride semiconductor layer, where the substrate thickness is increased to more than 50 μm, and the three-dimensional structure thickness is 10-1000 μm, allowing for the formation of a trapezoidal or pyramid-shaped light-emitting stack structure with edge and apex removals, and a SiO2 passivation layer to reduce crystal defects and enhance light emission.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If a three-dimensional light-emitting stack structure is formed using selective growth, then the area of the active layer can be increased without changing chip size, but crystal defects occur at the apex and valley of the pyramid structure leading to non-uniform light emission
Solution Approach 1:
The patent applies preliminary action by forming a mask pattern before epitaxial growth that pre-determines the three-dimensional structure geometry. The mask pattern is designed with specific geometric features (such as trapezoidal or pyramidal shapes with controlled apex angles and side wall angles) that guide the selective growth process to create structures with optimized dimensions that minimize crystal defects while maximizing active layer area.
Solution Approach 2:
The patent employs parameter changes by systematically varying critical geometric parameters including the apex angle (α), side wall angle (β), thickness (d), and base dimensions of the three-dimensional structure. By optimizing these parameters within specific ranges, the patent achieves a balance between increasing active layer area and minimizing crystal defects at critical locations such as the apex and valley regions.
2Reliability
If the thickness of the pyramid structure is increased, then crystal defects at apex and valley are reduced, but the chip size increases which reduces yield and increases price
Solution Approach 1:
The patent applies dimensionality change by transitioning from a conventional two-dimensional planar active layer to a three-dimensional light-emitting stack structure. This vertical dimensionality allows the active layer to extend in the thickness direction (d) while maintaining a compact footprint on the chip surface. The three-dimensional structure with controlled geometry enables increased effective emission area without proportionally increasing chip size, thereby improving yield while reducing crystal defects through optimized thickness.
3Reliability
If the operating current density is reduced by increasing active layer area, then internal quantum efficiency increases, but chip size must be increased which reduces yield
Solution Approach 1:
The patent applies the nested doll principle by creating a multi-layered three-dimensional light-emitting stack structure where the active layer is nested within a vertically extended structure. This nesting approach allows the active layer to achieve a larger effective area by utilizing the vertical dimension, enabling current density reduction and improved internal quantum efficiency without increasing the overall chip footprint, thus maintaining high manufacturing yield.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The increased substrate and light-emitting stack thickness reduces the impact of crystal defects, enabling higher internal quantum efficiency and improved light extraction efficiency without increasing chip size, thus enhancing the LED's performance for general illumination applications.
Implementation Method 1
A method for manufacturing a semiconductor LED is provided, which comprises: preparing a conductive substrate having a three-dimensional top surface; sequentially growing an n-type nitride semiconductor layer, an active layer, and a p-type nitride semiconductor layer on the conductive substrate, thereby forming a three-dimensional light-emitting stack structure; forming a plurality of p-electrodes on the p-type nitride semiconductor layer; forming a plurality of n-electrodes on a bottom surface of the conductive substrate; and removing portions of the three-dimensional light-emitting stack structure that are formed at edges of the trapezoidal pyramid structures, or removing apexes of the pyramid structures, thereby reducing bad effects caused by crystal defects
Data Source
AI summary
A high-efficiency semiconductor light emitting diode and a method for manufacturing the same are provided. The semiconductor LED has high internal quantum efficiency and can reduce the bad effect caused by the crystal defect. In the semiconductor light emitting diode, a conductive substrate has a three-dimensional top surface, and a light-emitting stack structure has a three-dimensional structure and includes an n-type nitride semiconductor layer, an active layer, and a p-type nitride semiconductor layer, which are sequentially formed on the conductive substrate. A p-electrode is formed on the p-type nitride semiconductor layer, and an n-electrode is formed on a bottom surface of the conductive substrate.