Semiconductor Active Region Grain Defect Mitigation

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Solution Overview

Problem

Conventional semiconductor manufacturing processes, such as the shallow-trench isolation (STI) process, face challenges with high process complexity and inefficiency due to the formation of poly grains at the boundary surface between the active region and the device isolation layer, leading to deteriorated electrical characteristics and uniformity, especially in peripheral/core areas.

Innovation Solution

A method involving laser-induced epitaxial growth (LEG) and selective epitaxial growth (SEG) processes is employed to form active regions on a semiconductor substrate, where the LEG process is optimized to minimize poly grains by controlling the optical energy of the laser and using a multilayer structure with a nitride layer to prevent grain formation, and SEG is used to form single-crystalline semiconductor material in the peripheral/core area with a recessed profile that opposes the inclination of the device isolation pattern.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If the LEG process is used to form active regions, then single-crystalline silicon formation is improved, but poly grains form at the boundary surface between active region and device isolation layer

Engineering Contradiction:
Improvesingle-crystalline silicon formationVSAvoidpoly grains at boundary surface
Core Design Contradiction:
Manufacturing precisionVSObject-generated harmful factors

Solution Approach 1:

A nitride layer is introduced as an intermediary between the active region and device isolation layer to prevent poly grain formation at the boundary surface. The nitride layer acts as a barrier that stops the epitaxial growth from extending into the isolation layer, thereby eliminating the harmful poly grains while maintaining single-crystalline silicon formation in the active region.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent applies different materials and growth conditions to different regions: single-crystalline silicon is grown in the active region through LEG, while the nitride layer is specifically placed at the boundary to prevent poly grain formation. This local differentiation of material properties and growth control resolves the contradiction between achieving single-crystalline quality and preventing poly grain formation at boundaries.

Inventive Principle:
Principle #3Local quality

2Reliability

If conventional STI process is used, then device isolation is achieved, but process complexity and manufacturing steps are high

Engineering Contradiction:
Improvedevice isolationVSAvoidprocess complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent combines the active region formation and device isolation formation into a single integrated process. By using LEG to grow single-crystalline silicon in the active region and simultaneously forming the device isolation layer in the field region, the process eliminates the need for separate STI steps, thereby reducing process complexity while maintaining reliable device isolation.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

Instead of forming device isolation first and then active regions (conventional approach), the patent inverts the sequence by actively forming the active region through LEG, which passively defines the device isolation layer. This inversion simplifies the overall process by making the active region formation the driving step rather than the isolation formation.

Inventive Principle:
Principle #13The other way round (Inversion)

3Reliability

If device isolation layer is formed in trench, then electrical insulation is achieved, but gap-fill characteristics deteriorate with reduced design rule

Engineering Contradiction:
Improveelectrical insulationVSAvoidgap-fill characteristics
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The device isolation layer is formed passively through the self-limiting nature of the LEG process. As single-crystalline silicon grows in the active region, it naturally stops at the boundary where the nitride layer is present, automatically defining the isolation region without requiring manual gap-filling operations. This self-service mechanism maintains electrical insulation while avoiding gap-fill deterioration.

Inventive Principle:
Principle #25Self-service

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces process failures and improves electrical stability by ensuring uniform single-crystalline silicon formation across the substrate, enhancing the electrical characteristics and uniformity of the active regions, particularly in the peripheral/core areas.

Implementation Method 1

a laser is irradiated onto the polysilicon layer, to thereby transform the polysilicon layer into a single-crystalline silicon layer

Methodology Applied
Scientific EffectLaser-induced epitaxial growth: Laser

Implementation Method 2

The single-crystalline silicon recrystallized from the polysilicon layer is grown to the single-crystalline silicon layer by a selective epitaxial growth (SEG) process

Methodology Applied
Scientific EffectEpitaxial growth: Epitaxy

Implementation Method 3

the polysilicon layer is momentarily melted and recrystallized into single-crystalline silicon

Methodology Applied
Scientific EffectRecrystallization: Crystallisation

Data Source

PatentUS8350336B2Semiconductor device and method of manufacturing the same
Publication Date: 2013.01.08 SAMSUNG ELECTRONICS CO LTD
  • US8350336B2 patent drawing
  • US8350336B2 patent drawing
  • US8350336B2 patent drawing

AI summary

In a semiconductor device and a method of manufacturing the same, a first insulation layer is removed from a cell area of a substrate and a first active pattern is formed on the first area by a laser-induced epitaxial growth (LEG) process. Residuals of the first insulation layer are passively formed into a first device isolation pattern on the first area. The first insulation layer is removed from the second area of the substrate and a semiconductor layer is formed on the second area of the substrate by a SEG process. The semiconductor layer on the second area is patterned into a second active pattern including a recessed portion and a second insulation pattern in the recessed portion is formed into a second device isolation pattern on the second area. Accordingly, grain defects in the LEG process and lattice defects in the SEG process are mitigated or eliminated.