Semiconductor Package Lid Layout to Prevent Capacitor Shorting
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Solution Overview
Problem
Semiconductor devices with low-k interlayer insulating films face thermal stress-induced cracks due to thermal expansion coefficient differences between silicon substrates and wiring substrates, and thinning the semiconductor chip to prevent cracks results in capacitor terminal short-circuiting, compromising device reliability.
Innovation Solution
A semiconductor device design where the semiconductor chip is thinner than the capacitors, with capacitors mounted in notched portions of the lid to prevent short-circuiting and maintain reliability, and an adhesive layer is used to bond the lid to the chip, allowing for thermal management and stress relief.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If the semiconductor chip is thinned to reduce thermal stress on the interlayer insulating film, then crack formation in the Low-k film is prevented, but the gap between the lid and capacitor is eliminated causing short-circuiting
Solution Approach 1:
The insulating layer serves as a mediator that enables the chip thinning solution to work without causing the short-circuiting side effect. By placing this insulating barrier, the system can achieve stress relief through thinning while maintaining electrical insulation.
Solution Approach 2:
The insulating layer is applied locally at the critical interface between the metal lid and capacitor terminals. This localized treatment addresses the specific short-circuiting problem without requiring changes to the overall chip thickness or structure elsewhere.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design enhances the reliability of semiconductor devices by preventing capacitor short-circuiting and reducing thermal stress on the interlayer insulating film, while maintaining effective thermal management and electrical performance.
Implementation Method 1
a lid bonded to the first back surface of the semiconductor chip via a first adhesive layer
Implementation Method 2
a lid covering the semiconductor chip and the plurality of capacitors
Data Source
AI summary
Reliability of a semiconductor device is improved. The semiconductor device includes a wiring substrate, a semiconductor chip and a capacitor mounted on the upper surface of the wiring substrate, and a lid formed of a metallic plate covering the semiconductor chip and the wire in substrate. The semiconductor chip is bonded to the lid via a conductive adhesive layer, and the capacitor, which is thicker than the thickness of the semiconductor chip, is disposed in the cut off portion provided in the lid, and is exposed from the lid.


