Semiconductor Light Emitting Element With Buffer Layer Stress Management

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Solution Overview

Problem

Conventional semiconductor light emitting elements with conductive substrates of different materials experience internal stress, leading to layer delamination and reduced yield during chip division.

Innovation Solution

The semiconductor light emitting element incorporates additional layers between various structural components and features a main light extracting surface with an insulating film, along with specific materials like Au, Ni, Ag, and Pd for the bonding and reflective layers, and nitride semiconductors for improved light emission.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Illumination intensity

If conductive substrate and growth substrate are formed of different materials, then high-intensity light emission can be achieved, but distortion occurs in the layers due to internal stress causing delamination and reduced yield

Engineering Contradiction:
Improvelight emission intensityVSAvoidlayer bonding reliability
Core Design Contradiction:
Illumination intensityVSReliability

Solution Approach 1:

A buffer layer is introduced between the conductive substrate and the semiconductor layers to act as an intermediary that absorbs internal stress and prevents delamination, enabling the use of different material substrates while maintaining layer bonding reliability

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The gradual transition of material composition in the buffer layer (changing from GaN to AlN progressively) allows for controlled parameter changes that match the thermal expansion coefficients and lattice structures, reducing internal stress and preventing distortion

Inventive Principle:
Principle #35Parameter changes

2Illumination intensity

If conductive substrate and growth substrate are formed of different materials, then high-intensity light emission can be achieved, but the semiconductor layers may be delaminated when the wafer bonded body is divided into chips, reducing yield

Engineering Contradiction:
Improvelight emission intensityVSAvoidmanufacturing yield
Core Design Contradiction:
Illumination intensityVSProductivity

Solution Approach 1:

The buffer layer is designed beforehand to cushion and absorb the internal stress that will occur during wafer bonding and chip division, preventing delamination before the chips are actually separated, thereby maintaining high manufacturing yield

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

3Reliability

If outer peripheries of semiconductor layers are removed, then distortion and delamination are reduced improving yield, but additional manufacturing steps are required

Engineering Contradiction:
Improvelayer bonding reliabilityVSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The outer peripheries of the semiconductor layers are removed in advance before chip division to prevent distortion and delamination during subsequent processing steps, addressing the problem proactively rather than reactively

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration reduces distortion and delamination, enhancing yield and light extraction efficiency by forming unevenness on the semiconductor surfaces and using appropriate etching processes.

Implementation Method 1

a bonding metal layer formed on the conductive substrate

Methodology Applied
Scientific EffectBonding: Welding

Implementation Method 2

a reflective layer formed on the barrier layer

Methodology Applied
Scientific EffectReflection: Reflection

Implementation Method 3

using appropriate etching processes

Methodology Applied
Scientific EffectEtching: Ablation

Implementation Method 4

a light emitting layer formed on the second conductivity type semiconductor layer

Methodology Applied
Scientific EffectElectroluminescence: Electroluminescence

Data Source

PatentUS7611992B2Semiconductor light emitting element and method of manufacturing the same
Publication Date: 2009.11.03 XIAMEN SANAN OPTOELECTRONICS CO LTD
  • US7611992B2 patent drawing
  • US7611992B2 patent drawing
  • US7611992B2 patent drawing

AI summary

A semiconductor light emitting element including a conductive substrate, a bonding metal layer formed on the conductive substrate, a barrier layer formed on the bonding metal layer, a reflective layer formed on the barrier layer, an ohmic electrode layer formed on the reflective layer, a second conductivity type semiconductor layer formed on the ohmic electrode layer, a light emitting layer formed on the second conductivity type semiconductor layer, and a first conductivity type semiconductor layer formed on the light emitting layer, wherein outer peripheries of the second conductivity type semiconductor layer, the light emitting layer, and the first conductivity type semiconductor layer are removed, and a method of manufacturing the same are provided.