Semiconductor Light-Emitting Device Phosphor Layer Configuration
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Solution Overview
Problem
Conventional methods for manufacturing semiconductor light-emitting devices often result in inefficient light extraction and chromaticity variation due to the limited coverage of the phosphor layer, which is typically applied only on the upper surface of the LED, leading to unnecessary coating of non-emitting areas and reduced productivity.
Innovation Solution
A semiconductor light-emitting device structure where the phosphor layer is applied both on the top and side surfaces of the semiconductor layers, with a protruding shape and insulating layer configuration, allowing for uniform light extraction and reduced unnecessary coating, enhancing chromaticity and productivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If the phosphor layer is applied only on the upper surface of the LED wafer, then the manufacturing process is simple, but the light extraction efficiency is insufficient and chromaticity varies
Solution Approach 1:
The patent extends the phosphor layer application from a single dimension (upper surface only) to multiple dimensions (upper surface and side surfaces). This dimensional expansion ensures that light emitted in various directions interacts with the phosphor layer, achieving uniform light extraction and consistent chromaticity while maintaining manufacturing simplicity through wafer-level processing.
Solution Approach 2:
The patent segments the phosphor layer application into distinct regions: a first phosphor layer on the upper surface and a second phosphor layer on the side surfaces. This segmentation allows optimized phosphor coverage in different spatial zones, ensuring comprehensive light interaction while maintaining process efficiency through continuous coating methods.
2Manufacturing precision
If the phosphor layer is applied to cover all areas including non-emitting regions, then chromaticity uniformity improves, but material waste increases and productivity decreases
Solution Approach 1:
The patent applies phosphor layer only where light emission occurs: the first phosphor layer covers the light-emitting area on the upper surface, and the second phosphor layer covers the side surfaces. Non-emitting regions such as electrode areas remain uncovered. This localized application achieves chromaticity uniformity in emitting regions while avoiding material waste and maintaining high manufacturing productivity.
3Manufacturing precision
If the phosphor layer is applied to side surfaces, then light extraction efficiency improves, but device complexity increases
Solution Approach 1:
The patent merges the upper surface phosphor layer and side surface phosphor layer into a continuous phosphor structure that wraps around the light-emitting region. This integrated approach improves light extraction efficiency by capturing light from multiple angles while avoiding the complexity of separate, discontinuous phosphor applications. The continuous structure is achieved through efficient wafer-level processing techniques.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables uniform light emission with desired chromaticity and reduced unnecessary phosphor layer application, improving light extraction efficiency and manufacturing productivity by covering both top and side surfaces with a continuous phosphor layer, thus addressing the limitations of existing methods.
Implementation Method 1
a phosphor layer which is applied on the first major surface and the side surface of the semiconductor layers
Data Source
Figure 1A~1B
Figure 2A~2C
Figure 3A~3C
AI summary
A semiconductor light-emitting device includes: a first semiconductor layer (12) having a first major surface (10), a second major surface which is an opposite side from the first major surface (10), and a side surface (12a); a second semiconductor layer (13) provided on the second major surface of the first semiconductor layer (12) and including a iight-emitting layer; electrodes (15,16) provided on the second major surface of the first semiconductor layer (12) and on a surface of the second semiconductor layer (13) on an opposite side from the first semiconductor layer (12); an insulating layer (17) having a first surface (17a) formed on the second major surface side of the first semiconductor layer (12) and a second surface (17b) which is an opposite side from the first surface (17a); an external terminal (24) which is a conductor provided on the second surface (17b) side of the insulating layer (17); and a phosphor layer (40) provided on the first major surface (10) of the first semiconductor layer (12) and on a portion of the first surface (17a) of the insulating layer (17), the portion being adjacent to the side surface (12a) of the first semiconductor layer (12).