Semiconductor Light Emitting Device Surface Tension Wall
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Solution Overview
Problem
The manufacturing process of semiconductor light emitting devices is hindered by defects such as misalignment and vacancies during the sorting and packaging stages, leading to reduced production yield and efficiency, as well as suboptimal light extraction efficiency due to imperfect encapsulant formation and chip alignment.
Innovation Solution
A semiconductor light emitting device is manufactured using a dam with an opening to support a semiconductor light emitting chip, where a wall with an elevated upper end is formed by surface tension effects, and an encapsulant is created in a bowl shape defined by the wall and chip, enhancing light transmission and reducing package size.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a conventional sorting and packaging process is used to manufacture semiconductor light emitting devices, then chips can be processed in batch, but misalignment and vacancies occur during sorting, leading to reduced production yield
Solution Approach 1:
The patent applies preliminary action by pre-forming the encapsulant material in a mold cavity before chip mounting, and pre-positioning chips in the designated mounting regions. This ensures that chips are already aligned and spaced correctly before the encapsulation process, eliminating misalignment and vacancy issues that occur during post-sorting operations.
Solution Approach 2:
The patent merges the chip mounting process with the encapsulation process into a single integrated operation. Chips are mounted directly into the mold cavity where the encapsulant will be formed, combining two separate processes (sorting/mounting and encapsulation) into one synchronized operation that ensures precise alignment and eliminates vacancies.
2Ease of manufacture
If chips are sorted and mounted on a substrate, then packaging can be performed, but vacancies and misalignment reduce overall efficiency and require reprocessing
Solution Approach 1:
The encapsulant material is pre-formed in the mold cavity with precise geometric features defined before chip mounting. This preliminary formation of the encapsulant structure provides built-in alignment guides and positioning features that ensure chips are mounted in the correct positions, eliminating the need for reprocessing due to misalignment or vacancies.
Solution Approach 2:
The encapsulant material itself serves as the alignment and positioning mechanism. The pre-formed encapsulant structure with its specific geometric features automatically guides chip placement and ensures proper positioning, making the system self-aligning without requiring external sorting or separate positioning operations.
3Illumination intensity
If encapsulant is formed over mounted chips, then light extraction can occur, but imperfect encapsulant formation reduces light extraction efficiency
Solution Approach 1:
The encapsulant material is pre-formed in the mold cavity with precise control over its shape, volume, and surface features before chip mounting. This preliminary formation ensures that the encapsulant will have the optimal geometry for light extraction, including controlled refractive index distribution and surface characteristics, eliminating defects that would reduce light extraction efficiency.
Solution Approach 2:
The patent controls the physical and chemical parameters of the encapsulant material during pre-forming, including its viscosity, curing characteristics, and refractive index. By optimizing these parameters, the encapsulant achieves the desired precision in formation and the optimal optical properties for maximum light extraction efficiency.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in improved light beam angle control, reduced phosphor usage, and increased efficiency, enabling the production of compact Chip Scale Package (CSP) devices with enhanced light extraction and mounting capabilities as Surface Mount Devices (SMDs).
Implementation Method 1
a wall with an elevated upper end caused by surface tension effects
Data Source
AI summary
The present disclosure relates to a semiconductor light emitting device and a method for manufacturing the same, in which the semiconductor light emitting device includes a semiconductor light emitting chip having a semiconductor light emitting part for generating light by electron-hole recombination, and at least one electrode electrically connected to the semiconductor light emitting part; a wall placed on a lateral side of the semiconductor light emitting part, with the wall having an elevated upper end caused by surface tension effects; and an encapsulant arranged in a bowl that is defined by the upper end of the wall and the semiconductor light emitting part, with the encapsulant for transmitting therethrough a light from the semiconductor light emitting part.