Semiconductor Light Emitting Device Shock Support

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Semiconductor light emitting devices, particularly those using group III-V nitride semiconductors, face challenges in withstanding mechanical shocks during bonding processes, which can lead to chip breakage and delamination, affecting their operational characteristics.

Innovation Solution

Incorporating a shock supporting member with a high melting point material, such as tungsten or molybdenum, and a conductive support member to absorb shocks and enhance the structural integrity of the semiconductor layers, while a channel layer is used to improve bonding strength and prevent lateral delamination.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If semiconductor light emitting devices are used in bonding processes, then light emission function is achieved, but mechanical shock resistance deteriorates causing chip breakage and delamination

Engineering Contradiction:
Improvechip breakage resistanceVSAvoidmechanical shock resistance
Core Design Contradiction:
ReliabilityVSStrength

Solution Approach 1:

The patent applies beforehand cushioning by introducing a shock supporting member made of high melting point material (such as tungsten or molybdenum) positioned at the lower surface of the semiconductor layers corresponding to the pad location. This member is prepared in advance to absorb and distribute mechanical shocks during bonding processes, preventing chip breakage and delamination before they occur. The shock supporting member acts as a pre-positioned protective element that cushions the vulnerable semiconductor layers during subsequent bonding operations.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

2Strength

If shock supporting member is added to protect semiconductor layers, then mechanical strength is improved, but device structure becomes more complex

Engineering Contradiction:
Improveshock resistanceVSAvoidstructural complexity
Core Design Contradiction:
StrengthVSDevice complexity

Solution Approach 1:

The patent applies universality by designing the shock supporting member to serve multiple functions simultaneously. The high melting point material member not only provides mechanical shock resistance but also serves as a thermal management element due to its high melting point properties, and acts as a structural support during bonding processes. This multi-functional design allows a single component to address multiple requirements (mechanical strength, thermal stability, structural support) without proportionally increasing device complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If channel layer is introduced to prevent lateral delamination, then bonding strength is improved, but manufacturing process becomes more complex

Engineering Contradiction:
Improvebonding strengthVSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent applies the intermediary principle by introducing a channel layer that acts as a mediator between the semiconductor layers and the surrounding structure. This channel layer, positioned to extend laterally from the semiconductor layers, serves as an intermediate structural element that prevents lateral delamination during bonding processes. The channel layer mediates the stress distribution and provides a transition zone that enhances bonding strength while maintaining a relatively simple manufacturing approach through selective lateral extension.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUSRE48774E1Semiconductor light emitting device
Publication Date: 2021.10.12 SUZHOU LEKIN SEMICON CO LTD
  • USRE48774E1 patent drawing
  • USRE48774E1 patent drawing
  • USRE48774E1 patent drawing

AI summary

Disclosed is a semiconductor light emitting device. The semiconductor light emitting device includes a plurality of compound semiconductor layers including a first conductive semiconductor layer, an active layer and a second conductive semiconductor layer; a pad on the plurality of compound semiconductor layers; an electrode layer under the plurality of compound semiconductor layers; and a supporting member disposed under the plurality of compound semiconductor layers and corresponding to the pad.