Semiconductor Light Emitting Device Side-Etching Contact

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Solution Overview

Problem

Semiconductor light emitting devices face challenges in improving light extraction efficiency while minimizing the increase in forward voltage (VF), as the third auxiliary layer, which is an ohmic contact layer, limits the material composition that can enhance light extraction due to its requirements for excellent ohmic characteristics.

Innovation Solution

The semiconductor light emitting device incorporates a second conductivity type layer with a first layer having an end portion below the second electrode and a space formed between the end portion and the peripheral edge of the second electrode, allowing for reduced contact area and using a nitric acid-based dilute solution for side-etching to minimize the etching amount, thereby suppressing the increase in forward voltage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Illumination intensity

If the third auxiliary layer is processed to improve light extraction efficiency, then light extraction efficiency is improved, but forward voltage increases

Engineering Contradiction:
Improvelight extraction efficiencyVSAvoidforward voltage
Core Design Contradiction:
Illumination intensityVSUse of energy by moving object

Solution Approach 1:

The patent extracts the problematic third auxiliary layer (ohmic contact layer) from the light extraction path by forming a space between the electrode and the layer, removing it laterally through etching. This allows light to pass through without being absorbed by the layer material, improving extraction efficiency while maintaining low forward voltage through the preserved electrical contact.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent applies local quality by creating a differentiated structure where the third auxiliary layer is present under the electrode for electrical contact but removed in the peripheral regions for light extraction. This local modification allows simultaneous optimization of both electrical performance and optical performance in different spatial zones.

Inventive Principle:
Principle #3Local quality

2Illumination intensity

If the contact area between the second electrode and the first layer is reduced, then light extraction efficiency is improved, but forward voltage increases

Engineering Contradiction:
Improvelight extraction efficiencyVSAvoidforward voltage
Core Design Contradiction:
Illumination intensityVSReliability

Solution Approach 1:

The patent resolves the contradiction by transitioning from a two-dimensional contact area consideration to a three-dimensional structure. The first layer extends vertically below the electrode surface, maintaining adequate electrical contact area for low forward voltage, while the horizontal space between the electrode edge and layer edge improves light extraction. This vertical extension allows simultaneous satisfaction of both requirements.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration enhances light extraction efficiency while maintaining a low forward voltage, as the reduced contact area between the second electrode and the first layer limits light absorption and reflection, and the controlled etching process prevents excessive increase in VF.

Implementation Method 1

forming a space between an end portion of the first layer and a peripheral edge of the second electrode by side-etching the first layer toward a lower side of the second electrode using a nitric acid-based dilute solution

Methodology Applied
Scientific EffectChemical etching: Ablation

Data Source

PatentUS11626539B2Semiconductor light emitting device and method for manufacturing semiconductor light emitting device
Publication Date: 2023.04.11 ROHM CO LTD
  • US11626539B2 patent drawing
  • US11626539B2 patent drawing
  • US11626539B2 patent drawing

AI summary

Method for manufacturing semiconductor light-emitting device having a substrate, a metal layer over the substrate, and a semiconductor layer over the metal layer. The semiconductor layer includes a light-emitting layer, and with respect to the light-emitting layer, a first conductivity type layer at a substrate side and a second conductivity type layer opposite the substrate. The second conductivity type layer includes a first layer forming a semiconductor layer surface and a second layer at the substrate side with respect to the first layer. The method includes exposing a second layer surface by selectively removing the first layer, forming an uneven surface portion of the second layer by frost processing the exposed surface, forming an electrode over the first layer, forming a space between an end portion of the first layer and a peripheral edge of the electrode by side-etching the first layer toward a lower side of the electrode using a nitric acid-based dilute solution, and forming another electrode below the substrate.