Semiconductor UV Light Receiving Element Shallow Junction Formation

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Solution Overview

Problem

Existing methods for manufacturing semiconductor devices with both ultraviolet light receiving elements and MOS transistors on a silicon substrate face issues such as etching damage to the insulating film, low reliability due to charge traps, and difficulty in achieving a shallow junction for high sensitivity, leading to low throughput and incomplete ion implantation.

Innovation Solution

A method involving the formation of a first thermal oxide film as a gate oxide, followed by a second thermal oxide film for ion implantation in the light receiving element region, allowing for a low-dose impurity concentration and a shallow junction without etching damage, with the second oxide film being newly formed after removing the gate oxide film.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If a first thermal oxide film is formed as a gate oxide film and then patterned to form a gate electrode, then the MOS transistor can be formed, but the insulating film in the light receiving element region suffers etching damage and contains charge traps, reducing reliability

Engineering Contradiction:
ImproveMOS transistor formationVSAvoidlight receiving element reliability
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The oxide film formation process is segmented into two distinct stages: first forming a gate oxide film for the MOS transistor region, then removing it and forming a second oxide film for the light receiving element region. This segmentation allows each region to have an oxide film optimized for its specific function, preventing etching damage to the light receiving element's insulating film.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the semiconductor device are given different oxide film qualities: the MOS transistor region receives a gate oxide film with specific thickness and properties, while the light receiving element region receives a second oxide film formed without etching damage. This local differentiation ensures each region has the optimal insulating film characteristics for its intended function.

Inventive Principle:
Principle #3Local quality

2Quantity of substance

If ion implantation is performed through a thick insulating film to form an impurity region, then the impurity concentration can be increased, but the junction depth increases and the light receiving sensitivity decreases

Engineering Contradiction:
Improveimpurity concentrationVSAvoidjunction depth control
Core Design Contradiction:
Quantity of substanceVSManufacturing precision

Solution Approach 1:

The gate oxide film is removed before forming the second oxide film and performing ion implantation. This preliminary removal creates a condition where ion implantation can be performed through a thinner oxide film, enabling precise control of junction depth while achieving the required impurity concentration for the light receiving element.

Inventive Principle:
Principle #10Preliminary action

3Manufacturing precision

If the insulating film is made thin to achieve shallow junction, then ion implantation dose can be reduced, but the film may not provide sufficient insulation and protection

Engineering Contradiction:
Improvejunction depthVSAvoidinsulating film quality
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The second oxide film acts as an intermediary layer that is optimized specifically for the light receiving element region. It provides the necessary insulation and protection while being thin enough to allow effective ion implantation for forming the shallow junction, resolving the conflict between insulation quality and junction depth control.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach results in a semiconductor device with high reliability and a shallow junction, enabling effective detection of ultraviolet light with improved sensitivity and reduced manufacturing failures, while maintaining the quality of the insulating film in contact with the silicon surface.

Implementation Method 1

a first thermal oxide film, which serves as a gate oxide film of a MOS transistor, is formed on a surface of a silicon substrate

Methodology Applied
Scientific EffectThermal oxidation: Oxidation

Implementation Method 2

ion implantation of an impurity is performed on the light receiving element forming region through the second thermal oxide film, to thereby form an impurity region

Methodology Applied
Scientific EffectIon implantation: Ion Implantation

Implementation Method 3

a light receiving element configured to detect short-wavelength light, for example, an ultraviolet light

Methodology Applied
Scientific EffectPhotoelectric effect: Photoelectric Effect

Implementation Method 4

A penetration depth of light in silicon (a depth at which an intensity of the incident light to the silicon is attenuated to 1/e due to absorption) has a wavelength dependence

Methodology Applied
Scientific EffectLight absorption: Absorption (EM radiation)

Data Source

PatentUS10043848B2Semiconductor device and a method of manufacturing a semiconductor device
Publication Date: 2018.08.07 ABLIC INC
  • US10043848B2 patent drawing
  • US10043848B2 patent drawing
  • US10043848B2 patent drawing

AI summary

In order to form a light receiving element having high reliability and a MOS transistor together on the same silicon substrate, after forming a gate electrode of the MOS transistor, a gate oxide film in a light receiving element forming region is removed. Then, a thermal oxide film is newly formed in the light receiving element forming region, and ion implantation is performed in the light receiving element forming region through the thermal oxide film such that a shallow pn junction is formed.