Semiconductor Wiring Layout With Line Identifier for Wire Position Recognition
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Solution Overview
Problem
In high-integration semiconductor devices, the increasing number of parallel wirings makes it difficult to accurately identify the position of a specific wiring, such as a bit line, due to the complexity and similarity of the wiring layout.
Innovation Solution
A semiconductor device design that includes a stacked structure with insulation and electrode layers, where a line identifier is strategically positioned between wiring groups to facilitate easy identification of each wiring by creating distinct overlap regions, allowing for clear differentiation between parallel horizontal wirings.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the number of wirings is increased to achieve high integration, then the integration level is improved, but the ease of identifying wiring positions deteriorates
Solution Approach 1:
A line identifier is introduced as an intermediary element between adjacent wirings (bit lines or source/drain lines). This line identifier serves as a visual mediator that facilitates the recognition and differentiation of closely spaced parallel wirings, thereby maintaining ease of identification even as the number of wirings increases for high integration.
2Adaptability or versatility
If more wirings are added to increase functionality, then the device capability is improved, but the complexity of wiring layout increases
Solution Approach 1:
The wiring structure is segmented by introducing line identifiers that visually divide and separate adjacent wirings. This segmentation approach allows multiple wirings to be laid out in parallel while maintaining clear visual boundaries, thereby managing the complexity of the wiring layout as the device capability increases.
3Area of stationary object
If wirings are placed closer together to increase density, then the area efficiency is improved, but the difficulty of detecting and measuring wiring positions increases
Solution Approach 1:
The line identifier is formed with a different material composition than the surrounding wirings, creating a distinct visual contrast. This material-based differentiation enables easy detection and identification of wiring positions even when wirings are densely packed, thereby maintaining detectability while achieving high area efficiency.
Data Source
AI summary
A semiconductor device includes a stacked structure disposed on a substrate. The stacked structure includes a plurality of insulation layers and a plurality of electrode layers alternately stacked in a third direction intersecting with first and second directions. A plurality of channel structures extends through the stacked structure in the third direction. A first wiring group includes a plurality of first horizontal wirings disposed on the stacked structure that are arranged in the first direction and extends in the second direction. A second wiring group includes a plurality of second horizontal wirings disposed on the stacked structure that are arranged in the first direction and extends in the second direction. Each of the plurality of first and second horizontal wirings are connected to corresponding one of the plurality of channel structures. A first line identifier is disposed between the first wiring group and the second wiring group.