Semiconductor Line via Hole Structure for Void Reduction
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Solution Overview
Problem
Conventional copper (Cu) lines in semiconductor devices are prone to breakage and high electrical resistance due to voids and thermal stress caused by inadequate contact area and current concentration between the underlying line and the Cu line, as well as issues with copper diffusion and slow reaction with plasma ions during etching.
Innovation Solution
A semiconductor device and method involving a structure with a lower hole larger in diameter than the upper hole, where the lower hole has a conductive film on its internal wall and a Cu film filling both holes, ensuring increased contact area and reduced voids, and using barrier metals to prevent copper diffusion.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional Cu line is formed with the underlying line's surface and the via hole's side wall contacting at a right angle, then the manufacturing process is simple, but the portion at which the underlying line's surface and the Cu line's bottom contact each other experiences concentrated thermal stress and current, causing voids and line breakage
Solution Approach 1:
The patent transitions from a conventional planar contact structure to a three-dimensional recessed contact structure. The underlying line's surface is recessed to form a lower hole that communicates with the via hole, creating a multi-level contact geometry. This dimensional change increases the contact area between the Cu line and underlying line, distributing thermal stress and current density more evenly, thereby preventing void formation and line breakage while maintaining manufacturing feasibility through wet etching processes
2Reliability
If the underlying line's surface and the Cu line's bottom contact over a small area, then the manufacturing process is simple, but the line experiences concentrated current and high electrical resistance
Solution Approach 1:
The patent applies preliminary action by forming the recessed lower hole in the underlying line's surface before depositing the Cu line. This pre-formed recessed structure is designed to receive and accommodate the Cu line, ensuring that when the Cu line is deposited, it automatically makes contact over a larger area with the underlying line. This preliminary structuring eliminates the need for complex post-deposition processing to increase contact area, thereby reducing electrical resistance and improving reliability while maintaining manufacturing simplicity
3Reliability
If copper diffusion prevention is not implemented, then the manufacturing process is simple, but copper diffuses into insulation film, impairing line reliability
Solution Approach 1:
The patent introduces barrier metal films as intermediary layers between the Cu line and the surrounding insulation films. These barrier metals (such as tungsten or tantalum) are deposited on the inner walls of the via hole and lower hole, forming a protective interface that prevents copper atoms from diffusing into the insulation film during high-temperature processing. This intermediary barrier structure effectively blocks copper diffusion while adding minimal complexity to the manufacturing process, as the barrier metals can be deposited using standard sputtering or CVD techniques
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enhances the reliability and reduces electrical resistance of the semiconductor device by alleviating thermal stress and current concentration, making the Cu line less breakable and more reliable.
Implementation Method 1
a lower conductive film provided on an internal wall surface of the lower hole, an upper conductive film provided along an internal wall surface of the upper hole, and a conductive film containing copper and filling the upper and lower holes
Implementation Method 2
Cu, however, is diffusible into insulation film. If Cu diffuses into insulation film, the line would be impaired in reliability
Data Source
AI summary
A semiconductor device includes an interlayer insulation film, an underlying line provided in the interlayer insulation film, a liner film overlying the interlayer insulation film, an interlayer insulation film overlying the liner film. The underlying line has a lower hole and the liner film and the interlayer insulation film have an upper hole communicating with the lower hole, and the lower hole is larger in diameter than the upper hole. The semiconductor device further includes a conductive film provided at an internal wall surface of the lower hole, a barrier metal provided along an internal wall surface of the upper hole, and a Cu film filling the upper and lower holes. The conductive film contains a substance identical to a substance of the barrier metal. A highly reliable semiconductor device can thus be obtained.