Semiconductor Load and Sense Transistor Proportionality
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Solution Overview
Problem
The accuracy of current semiconductor arrangements for measuring current through a load transistor is compromised by differences in device characteristics between the load and sense transistors, primarily due to variations in manufacturing processes, leading to inconsistent proportionality factors between the load and sense currents.
Innovation Solution
The semiconductor arrangement integrates transistor cells with identical processing influences by using separate contact electrodes for the load and sense transistors, ensuring that both groups of cells have identical electrical characteristics, thereby maintaining proportional current measurement without process-induced variations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If the load transistor and sense transistor are produced using separate manufacturing processes, then each transistor can be optimized for its specific function, but differences in device characteristics result in inconsistent proportionality factors between load and sense currents
Solution Approach 1:
The invention segments the transistor cells into two distinct groups: load transistor cells and sense transistor cells. Each group is optimized for its specific function while both groups are manufactured using identical processes. The load transistor cells are configured for high current handling with appropriate doping and geometry, while the sense transistor cells are optimized for precise current sensing. This segmentation allows functional optimization without compromising measurement accuracy, as both segments undergo the same manufacturing process ensuring identical device characteristics within each group.
2Device complexity
If the load transistor and sense transistor share a common second load terminal, then manufacturing complexity is reduced, but process variations differently influence the threshold voltage of the transistors
Solution Approach 1:
The invention segments the second load terminal into two separate terminals: a first second load terminal for the load transistor and a second second load terminal for the sense transistor. This segmentation prevents process variations from differently influencing the threshold voltages of the two transistor types. By providing dedicated terminals, the invention ensures that manufacturing processes affect both transistor groups uniformly, maintaining consistent threshold voltage characteristics within each group while allowing independent optimization of their electrical parameters.
3Ease of operation
If the proportionality factor is based on active transistor area ratio, then current measurement is simplified, but differences in device characteristics between transistors compromise measurement accuracy
Solution Approach 1:
The invention applies local quality by ensuring that transistor cells within each group (load and sense) have identical device characteristics through uniform manufacturing processes. The sense transistor cells are specifically optimized for sensing applications with precise doping profiles and geometries, while load transistor cells are optimized for high current handling. This localized optimization within each group, combined with identical manufacturing processes, ensures that the proportionality factor based on active area ratio accurately reflects the current relationship without being compromised by device characteristic variations.
Data Source
AI summary
A semiconductor arrangement including a load transistor and a sense transistor that are integrated in a semiconductor body. One embodiment provides a number of transistor cells integrated in the semiconductor body, each transistor cell including a first active transistor region. A number of first contact electrodes, each of the contact electrodes contacting the first active transistor regions through contact plugs. A second contact electrode contacts a first group of the first contact electrodes, but not contacting a second group of the first contact electrodes. The transistor cells being contacted by first contact electrodes of the first group form a load transistor, with the second electrode forming a load terminal of the load transistor. The transistor cells being contacted by first contact electrodes of the second group form a sense transistor.