Local Connection Formation in Semiconductor Devices
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Solution Overview
Problem
As technology advances, the formation of local connections between gate and trench silicide in semiconductor devices becomes increasingly challenging, particularly due to the risk of short circuiting and the need for critical hardmask opens, which can lead to issues like gate and trench silicide shorts.
Innovation Solution
The method involves forming self-aligned embedded XC connections using recess spacers such as local interconnect caps, gate caps, and trench silicide caps to address these challenges, ensuring precise alignment and preventing short circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If local connections are formed between gate and trench silicide, then device functionality is improved, but the risk of short circuiting increases
Solution Approach 1:
A dielectric material is introduced as an intermediary substance between the gate and trench silicide components. This dielectric layer acts as a physical barrier that prevents direct electrical contact and potential short circuits while still allowing the local connection structure to be formed, thus maintaining device functionality without the harmful short circuiting effect
Solution Approach 2:
The gate structure is segmented into multiple regions with different treatments - some regions have local connections to trench silicide while other regions maintain isolation. This segmentation allows the device to achieve the necessary electrical connections in specific areas while preventing short circuits in other areas through selective formation of contacts
2Manufacturing precision
If critical hardmask opens are used for local connection formation, then precise alignment is achieved, but manufacturing complexity increases
Solution Approach 1:
Hardmask openings are formed in advance during earlier fabrication steps before the gate and trench silicide structures are fully developed. This preliminary action establishes the precise alignment pattern early in the process, allowing subsequent layers to be formed with correct positioning without requiring additional complex alignment steps later
Solution Approach 2:
The hardmask layer serves multiple functions - it acts as both the patterning definition for local connections and as a protective layer during subsequent processing steps. This multi-functionality reduces the need for separate dedicated alignment structures, thereby reducing overall manufacturing complexity while maintaining precision
Data Source
AI summary
A first TS is coupled to first S/D over first fin, second TS coupled to second S/D over first fin, third TS coupled to third S/D over second fin, fourth TS coupled to fourth S/D over second fin, gate metal over first and second fins, and gate cap over gate metal. First TS cap is on first TS, second TS cap on second TS, third TS cap on third TS, and fourth TS cap on fourth TS. ILD is formed on top of gate cap and first through fourth TS caps. First opening is through ILD and second TS cap such that part of gate metal is exposed, after removing part of gate cap. Second opening is through ILD to expose another part of gate metal. Combined gate metal contact and local metal connection is formed in first opening and individual gate metal contact is formed in second opening.