Semiconductor Device Local Wiring for Power Supply
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Solution Overview
Problem
Conventional semiconductor devices require two metal wiring layers for power supply, which reduces signal wiring resources and increases chip area, and the use of contact holes for substrate power supply can lead to defects and area expansion.
Innovation Solution
A semiconductor device layout with alternately arranged N-type and P-type well regions, utilizing a single metal wiring layer for potential supply and local wiring connected through contact holes to ensure efficient power distribution without area increase, allowing for reduced chip area and improved signal wiring resources.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If two metal wiring layers are used for power supply, then the power supply can be reliably supplied to the transistor, but the signal wiring resource is reduced and the chip area is increased
Solution Approach 1:
The invention merges the power supply function into the substrate structure by forming potential supply regions directly in the well regions, eliminating the need for separate metal wiring layers dedicated to power supply. This integration reduces chip area while maintaining reliable power distribution to transistors.
Solution Approach 2:
The invention transitions from a planar wiring approach (metal layers on surface) to a vertical substrate approach by forming potential supply regions within the well regions themselves. This dimensional change allows power supply without consuming additional lateral chip area.
2Reliability
If contact holes are used to supply substrate power supply, then the power can be delivered to the substrate, but the resistance increases or open failures occur and the area increases
Solution Approach 1:
The invention extracts the power supply connection from the contact hole structure and integrates it directly into the well region formation process. By forming potential supply regions within the well regions, the need for separate contact holes for power supply is eliminated, removing the associated reliability and precision problems.
Solution Approach 2:
The well regions serve dual functions: as the substrate for transistor formation and as the potential supply regions. This self-service approach eliminates the need for separate contact hole structures, reducing manufacturing complexity and improving reliability.
3Reliability
If the number of contact holes is increased to avoid defects, then the reliability improves, but the chip area is increased
Solution Approach 1:
The invention combines the power supply function with the well region structure, eliminating the need for multiple contact holes. This integration achieves reliable power supply without increasing chip area, as the potential supply regions are formed within the existing well region footprint.
Data Source
AI summary
A semiconductor device has first conductivity type regions extending in a first direction, and second conductivity type regions extending in the first direction. The first conductivity type regions and the second conductivity type regions are alternately arranged in a second direction perpendicular to the first direction. The semiconductor device includes a first impurity diffused regions formed in the first conductivity type regions, a first local wiring connected to the first conductivity type regions, and extending in the second direction, a first potential supply wiring formed above the first local wiring, and extending in the first direction, and a first contact hole for connecting the first local wiring to the first potential supply wiring.