Semiconductor Gate Structure Balancing Loss and Surge Voltage

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Solution Overview

Problem

Existing semiconductor devices face challenges in reducing loss while maintaining low surge voltage, often requiring complex circuit designs and increased costs due to multiple circuits to manage different electrical resistances.

Innovation Solution

A semiconductor device design with a high resistance region connected to a low resistance region via a single circuit, allowing for differential electrical resistance in current paths to control potential changes, thereby reducing loss and surge voltage through a single gate pulse.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If multiple circuits are used to manage different electrical resistances, then loss reduction is achieved, but device complexity increases

Engineering Contradiction:
ImprovelossVSAvoidcircuit complexity
Core Design Contradiction:
Loss of energyVSDevice complexity

Solution Approach 1:

The patent merges multiple circuits into a single circuit by providing only one gate electrode that controls both the first and second current paths. This single gate electrode structure integrates the functionality that would otherwise require separate circuits, thereby reducing device complexity while maintaining the ability to manage different electrical resistances in different current paths through selective impurity addition in the semiconductor regions

Inventive Principle:
Principle #5Merging (Combining)

2Loss of energy

If multiple circuits are used to control electrical resistance, then loss is reduced, but manufacturing cost increases

Engineering Contradiction:
ImprovelossVSAvoidmanufacturing cost
Core Design Contradiction:
Loss of energyVSEase of manufacture

Solution Approach 1:

The invention reduces manufacturing cost by eliminating the need for multiple separate circuits and their associated fabrication processes. The single gate electrode structure simplifies the manufacturing workflow, reduces the number of fabrication steps, and lowers overall production costs while still achieving loss reduction through the selective impurity addition method that creates different electrical resistances in different current paths

Inventive Principle:
Principle #5Merging (Combining)

3Loss of energy

If high resistance region is provided, then loss is reduced, but surge voltage increases

Engineering Contradiction:
ImprovelossVSAvoidsurge voltage
Core Design Contradiction:
Loss of energyVSObject-affected harmful factors

Solution Approach 1:

The patent applies local quality by adding impurities selectively to specific semiconductor regions (first and second current paths) to create different electrical resistances only where needed. This localized modification allows the high resistance region to reduce loss in specific current paths while the overall device structure and low resistance regions maintain acceptable surge voltage levels, achieving a balance between loss reduction and surge voltage control

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS12439675B2Semiconductor device and method for manufacturing the same
Publication Date: 2025.10.07 KK TOSHIBA
  • US12439675B2 patent drawing
  • US12439675B2 patent drawing
  • US12439675B2 patent drawing

AI summary

According to one embodiment, a semiconductor device includes first to third electrodes, a semiconductor member, a first conductive member, a connecting member, a first member, and an insulating member. The semiconductor member includes first to third semiconductor regions. The first semiconductor region is between the first electrode and the third semiconductor region. The first semiconductor region includes first to third partial regions. The second semiconductor region is between the first and third semiconductor regions. The second semiconductor region includes third and fourth semiconductor portions. The third semiconductor region includes first and second semiconductor portions. The second electrode is electrically connected with the third semiconductor region. The third electrode includes a first electrode portion. The first conductive member includes first to third conductive regions. The connecting member is electrically connected with the first conductive member. The first member is provided between the first electrode portion and the connecting member.