Semiconductor Low-Conducting Buried Layers for Carrier Trapping

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Solution Overview

Problem

Mobile carrier trapping and noise interference in semiconductor devices, particularly in wide bandgap materials like GaN, GaP, and GaAs, reduce peak current, maximum operating frequency, and efficiency due to defects and surface potential modulation.

Innovation Solution

Incorporating one or more low-conducting layers below the channel in semiconductor devices, with specific attributes configured based on target operating frequency and charge-discharge time to minimize carrier trapping and interference, where the product of lateral resistance and capacitance between the low-conducting layer and the channel is optimized to exceed the inverse of the target frequency while being less than the charge-discharge time or interfering frequency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If mobile carrier trapping occurs due to defects in wide bandgap materials, then the device can be manufactured with available materials, but the peak current, maximum operating frequency, and efficiency are reduced

Engineering Contradiction:
Improvemanufacturability with wide bandgap materialsVSAvoidpeak current and operating frequency
Core Design Contradiction:
Ease of manufactureVSProductivity

Solution Approach 1:

A low-conducting layer is introduced as an intermediary between the channel and the substrate. This layer acts as a mediator to remove trapped charges from the channel region, thereby improving peak current and operating frequency without changing the fundamental wide bandgap material structure that enables manufacturability.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The conductivity parameter of the layer adjacent to the channel is specifically modified by creating a low-conducting layer with controlled doping concentration or material composition. This parameter change enables the layer to selectively remove trapped charges while maintaining the overall device structure and manufacturability advantages of wide bandgap materials.

Inventive Principle:
Principle #35Parameter changes

2Adaptability or versatility

If surface potential modulation occurs due to noise sources and industrial equipment, then the device can operate in real environments, but noise and interference affect device performance

Engineering Contradiction:
Improveoperation in real environmentsVSAvoidnoise and interference
Core Design Contradiction:
Adaptability or versatilityVSObject-affected harmful factors

Solution Approach 1:

The low-conducting layer serves as a protective intermediary between the sensitive channel and external noise sources. It filters out noise and interference by providing a controlled electrical pathway that prevents direct coupling of external disturbances to the active channel region, thereby maintaining adaptability to real environments while reducing harmful effects.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Productivity

If a low-conducting layer is added below the channel to remove trapped charges, then operating frequency and efficiency improve, but device structure and manufacturing complexity increase

Engineering Contradiction:
Improveoperating frequency and efficiencyVSAvoiddevice structure
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The low-conducting layer is designed to perform multiple functions simultaneously: it removes trapped charges to improve operating frequency, provides noise filtering to enhance efficiency, and maintains compatibility with existing wide bandgap material fabrication processes. This multi-functionality justifies the additional structural element by delivering multiple performance benefits from a single added component.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS8994035B2Semiconductor device with low-conducting buried and/or surface layers
Publication Date: 2015.03.31 SENSOR ELECTRONIC TECHNOLOGY INC
  • US8994035B2 patent drawing
  • US8994035B2 patent drawing
  • US8994035B2 patent drawing

AI summary

A device including one or more low-conducting layers is provided. A low-conducting layer can be located below the channel and one or more attributes of the low-conducting layer can be configured based on a minimum target operating frequency of the device and a charge-discharge time of a trapped charge targeted for removal by the low-conducting layer or a maximum interfering frequency targeted for suppression using the low-conducting layer. For example, a product of the lateral resistance and a capacitance between the low-conducting layer and the channel can be configured to be larger than an inverse of the minimum target operating frequency and the product can be smaller than at least one of: the charge-discharge time or an inverse of the maximum interfering frequency.