Semiconductor Lower Electrode Stability via Segmented Support

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Solution Overview

Problem

The increase in height of lower electrodes in semiconductor devices to enhance capacitor area integration leads to structural instability and potential current leakage due to stress from support structures, affecting device performance.

Innovation Solution

A semiconductor device manufacturing method involving a stacked structure with guard ring trenches and support layers that physically isolate the cell array region from the peripheral circuit region, preventing current leakage and stabilizing the electrode structure without affecting the peripheral circuit region.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If the height of lower electrodes is increased to expand the effective area and ensure capacitor capacity, then the capacitor capacity is improved, but the lower electrodes may collapse and structural stability deteriorates

Engineering Contradiction:
Improvecapacitor capacityVSAvoidstructural stability
Core Design Contradiction:
Quantity of substanceVSStability of the object's composition

Solution Approach 1:

The patent divides the support structure into multiple segments: a first support structure extending from the substrate to a first height, and a second support structure extending from the first support structure to a second height greater than the first height. This segmented approach provides distributed support along the height of the lower electrode, preventing collapse while maintaining structural stability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from a planar support structure to a three-dimensional multi-level support structure by introducing support structures at different heights. The first and second support structures are arranged at different vertical levels, creating a hierarchical support system that enhances stability without increasing the footprint area.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Stability of the object's composition

If support structures are arranged between lower electrodes to prevent collapse, then structural stability is improved, but stress is exerted on lower electrodes causing distortion and electrical connections between different circuit areas resulting in current leakage

Engineering Contradiction:
Improvestructural stabilityVSAvoidelectrical connection reliability
Core Design Contradiction:
Stability of the object's compositionVSReliability

Solution Approach 1:

The patent applies different properties to different parts of the support structure. The first support structure has a first width and the second support structure has a second width, with the width varying at different heights. This local variation in geometry allows optimization of mechanical support while minimizing stress concentration and preventing electrical leakage paths.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent employs asymmetric arrangement of support structures with different widths at different levels. The first support structure and second support structure have different cross-sectional dimensions, creating an asymmetric profile that provides directional support and reduces stress on the lower electrode while preventing unwanted electrical connections.

Inventive Principle:
Principle #4Asymmetry

Data Source

PatentUS11676994B2Manufacturing method of semiconductor device and semiconductor device
Publication Date: 2023.06.13 FUJIAN JINHUA INTEGRATED CIRCUIT CO LTD
  • US11676994B2 patent drawing
  • US11676994B2 patent drawing
  • US11676994B2 patent drawing

AI summary

The present invention provides a manufacturing method of a semiconductor device and a semiconductor device. A semiconductor device is provided, the semiconductor device includes a substrate, a stacked structure disposed on the substrate, the substrate comprises a cell array region, a peripheral circuit region and a middle region between the cell array region and the peripheral circuit region, the stacked structure comprises a first support layer, a first trench located in the middle region, a second support layer located on an upper surface of the stacked structure, wherein parts of the second support layer is disposed in the first trench, a portion of a sidewall of the first support layer directly contacts a portion of a sidewall of the second support layer, and a capacitor structure located in the cell array region.