Semiconductor Mark Area for Wire Bonding Alignment
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Solution Overview
Problem
The accuracy of forming openings in solder resist for belt-like wiring in semiconductor devices is lower than the accuracy of forming the wiring itself, leading to displacement issues, which can prevent normal wire bonding due to the exposed area of the belt-like wiring being covered by the solder resist.
Innovation Solution
A mark area is formed in the opening of the solder resist corresponding to the wire bonding area, allowing precise positioning of the wire bonding area using the mark as a reference, and camera recognition is used to further adjust the position, ensuring accurate alignment and bonding.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If openings are formed in solder resist for belt-like wiring, then wire bonding can be performed, but the opening position may be displaced due to lower formation accuracy
Solution Approach 1:
A mark area is introduced as an intermediary reference element between the opening and the wire bonding area. The mark area serves as a mediator that enables accurate positioning of the wire bonding area relative to the opening, compensating for the displacement caused by lower opening formation accuracy. The mark area is formed with high precision and used as a reference point for subsequent wire bonding operations.
Solution Approach 2:
The patent replaces direct mechanical alignment based on opening position with optical recognition based on mark area position. Instead of relying on the mechanical precision of opening formation, the system uses camera recognition to detect the mark area and calculate the wire bonding area position, substituting optical measurement for mechanical positioning.
2Reliability
If the opening position is displaced, then wire bonding cannot be normally performed, but adding a mark area increases process complexity
Solution Approach 1:
The mark area is formed in advance during the solder resist formation process, before wire bonding operations. This preliminary action ensures that the reference mark is already in place when needed for positioning, allowing the wire bonding system to simply reference the pre-formed mark rather than requiring complex real-time alignment procedures.
Solution Approach 2:
The mark area creates a simplified copy or representation of the intended wire bonding position relationship. Instead of directly relying on the complex opening geometry and position, the system uses the simpler mark area as a copy reference that is easier to detect and use for positioning calculations.
Data Source
AI summary
Provided is a semiconductor device having improved reliability. In the semiconductor device in an embodiment, a mark is provided correspondingly to the bonding area of a belt-like wiring exposed from an opening provided in a solder resist. As a result, in an alignment step for the wire bonding area, the coordinate position of the wire bonding area can be adjusted using not the end portion of the opening formed in the solder resist, but the mark formed correspondingly to the wire bonding area as a reference. Also, in the semiconductor device in the embodiment, the mark serving as a characteristic pattern is formed. This allows the wire bonding area to be adjusted based on camera recognition.