Semiconductor Mask ACI Target Allocation for Accurate Pattern Transfer

The patent applies preliminary action by allocating ACI targets before PPC is performed. The method generates a design layout, allocates ACI targets to specific patterns in the design layout, and then performs PPC based on these pre-allocated targets. This preliminary allocation ensures that the PPC process can accurately compensate for optical proximity effects and loading effects, thereby improving pattern transfer accuracy without adding complexity during the actual manufacturing process.

The patent utilizes parameter changes by adjusting the ACI target parameters based on the specific characteristics of different patterns in the design layout. The method dynamically assigns different ACI target values to different patterns according to their location, shape, and surrounding environment. This parameter optimization enables the PPC process to achieve higher precision in correcting optical proximity effects and loading effects for each specific pattern, thereby improving overall pattern transfer accuracy.

The patent applies segmentation by dividing the chip area into multiple regions based on lower structure layouts, and then allocating ACI targets separately for each region. The method segments the design layout into different areas according to the underlying structure characteristics, and performs ACI target allocation and PPC processing for each segment independently. This segmentation approach enables parallel processing of different regions, reducing overall computational time while maintaining high pattern alignment accuracy through region-specific optimization.

The patent implements local quality by allocating different ACI target parameters to different local regions of the design layout based on their specific characteristics. The method analyzes the lower structure layout and assigns customized ACI targets to each local area according to its unique optical and etching characteristics. This localized approach ensures that each region receives optimal correction parameters tailored to its specific needs, achieving high pattern alignment accuracy without requiring uniform complex processing across the entire chip.

The patent applies feedback by incorporating etch skew measurement data into the ACI target allocation process. The method performs actual etching processes, measures the resulting etch skew (deviation from intended pattern), and uses this measured feedback to adjust and optimize the ACI targets for subsequent PPC operations. This feedback mechanism enables the system to learn from actual process variations and continuously improve pattern fidelity by compensating for loading effects based on real-world etching behavior rather than theoretical models alone.

The patent uses preliminary action by pre-calculating and storing etch skew data from reference patterns before performing PPC on the actual design layout. The method creates a lookup table or database of etch skew characteristics obtained from preliminary etching experiments, and then applies this pre-computed information during the PPC process to quickly compensate for loading effects without performing complex real-time calculations. This preliminary preparation reduces PPC process complexity while maintaining high pattern fidelity to the original design.