Semiconductor Mask Layer Segmentation for Photolithography Precision
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Solution Overview
Problem
The performance of semiconductor devices fabricated using existing technology is limited due to challenges in the photolithography process, particularly in achieving critical dimensions that exceed the physical limits of single-patterning processes, leading to undesired performance outcomes.
Innovation Solution
A method involving a to-be-etched layer with alternating first and second regions, where a first mask layer is formed, doping ions are implanted, and doped separation layers are created to divide the mask layer into portions, allowing for the formation of trenches in both regions, thereby improving the semiconductor device's performance by optimizing the photolithography process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a single-patterning photolithography process is used, then the fabrication process is simple, but the critical dimension cannot exceed the physical limits of the photolithography process
Solution Approach 1:
The patent applies segmentation by dividing the patterning process into multiple stages: first forming a preliminary pattern, then using that pattern to create separation layers, and finally forming the target pattern. This multi-stage approach allows the critical dimension to exceed the physical limits of a single photolithography step by breaking down the complex patterning task into manageable segments that can be achieved sequentially.
Solution Approach 2:
The patent employs preliminary action by first forming a preliminary pattern and separation layers before creating the final target pattern. The separation layers are formed in advance based on the preliminary pattern, and these pre-formed structures guide the subsequent formation of the target pattern, enabling achievement of critical dimensions that would be impossible in a direct single-step process.
2Manufacturing precision
If dual reconstruction technique is used to overcome photolithography limits, then critical dimension can be achieved, but the fabrication process becomes more complex
Solution Approach 1:
The patent segments the dual-patterning process into distinct functional stages: preliminary pattern formation, separation layer formation, and target pattern formation. Each stage has a specific purpose and uses appropriate materials and processes, reducing the overall complexity compared to conventional dual-patterning by clearly defining the role of each step and using material property differences (doped vs. undoped regions) to simplify process integration.
3Manufacturing precision
If photolithography process is used to transfer pattern, then pattern transfer is achieved, but the critical photolithography dimension approaches or exceeds physical limits
Solution Approach 1:
The patent introduces separation layers as intermediary structures that mediate between the preliminary pattern and the target pattern. These separation layers are formed in the mask layer at locations where adjacent first and second regions meet, and they serve as guides for subsequent etching processes. This intermediary approach allows accurate pattern transfer at critical dimensions by providing physical references that overcome the resolution limits of direct photolithography.
Solution Approach 2:
The patent changes material parameters by doping specific regions of the mask layer to create separation layers with different properties from the surrounding mask material. This parameter change (from undoped to doped) creates distinct etch selectivity and physical properties that enable precise definition of critical dimensions, allowing the process to achieve measurement precision beyond the limits of the photolithography exposure step itself.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method enhances the performance of semiconductor devices by improving the precision and accuracy of trench formation, reducing process difficulties, and maintaining the integrity of the separation mask layers, leading to better device performance.
Implementation Method 1
implanting doping ions into the first mask layer formed outside of the trench region; and forming a doped separation layer in the first mask layer of each second region
Data Source
AI summary
A method for fabricating a semiconductor device includes providing a to-be-etched layer, including alternately arranged first regions and second regions in a first direction. Each first region adjoins adjacent second regions, and each second region includes a trench region. The method includes forming a first mask layer on the to-be-etched layer; implanting doping ions into the first mask layer outside of the trench region; forming a doped separation layer in the first mask layer of the second region to divide the first mask layer into portions arranged in a second direction perpendicular to the first direction; forming a first trench in the first mask layer of the first region; and removing the first mask layer formed in the trench region on both sides of the doped separation layer to form a second trench divided into portions arranged in the second direction by the doped separation layer.