Semiconductor Pattern Density via Lithography Mask Segmentation
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Solution Overview
Problem
The challenge in semiconductor manufacturing is the inability to effectively form fine patterns due to the limitations of photolithography processes, where patterns spaced less than the resolution of the lithography equipment cannot be accurately transferred, leading to insufficient contrast and optical proximity effects that distort feature shapes.
Innovation Solution
A method is introduced to apportion patterns among multiple lithography masks, ensuring that adjacent patterns are spaced greater than the resolution, and incorporating dual patterns in masks where necessary, to maintain pattern density and reduce optical proximity effects, thereby improving the lithography process and etching precision.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If patterns are spaced closer to increase density, then manufacturing efficiency improves, but lithography resolution deteriorates causing insufficient contrast and optical proximity effects
Solution Approach 1:
The original mask layout is divided into multiple separate masks, each containing only patterns spaced greater than the lithography resolution. This segmentation allows each mask to be fabricated with sufficient contrast while collectively covering all required patterns, resolving the contradiction between pattern density and lithography resolution.
Solution Approach 2:
The solution transitions from a single two-dimensional mask to multiple two-dimensional masks used in sequence. By adding the dimension of multiple exposure steps, the system achieves equivalent or higher effective pattern density while maintaining adequate spacing within each individual mask for proper lithography resolution.
2Manufacturing precision
If patterns are spaced farther apart to improve lithography contrast, then manufacturing precision improves, but pattern density decreases reducing productivity
Solution Approach 1:
By segmenting the full pattern set into multiple masks, each mask can maintain optimal pattern spacing for high lithography contrast while the cumulative effect of all masks achieves the desired high overall pattern density. The segmentation allows density improvement without sacrificing contrast in any individual mask.
3Manufacturing precision
If multiple masks are used to maintain resolution, then manufacturing precision improves, but process complexity increases
Solution Approach 1:
The segmentation into multiple masks is performed systematically based on spatial relationships in the original layout, grouping patterns that can be safely exposed together. This organized approach minimizes the number of required masks while ensuring all patterns achieve proper resolution, balancing the increase in process steps against the gain in manufacturing precision.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the capability of the lithography process by ensuring sufficient contrast and reducing process variation, leading to improved critical dimension uniformity and reduced etch skew, enabling the formation of fine semiconductor patterns with increased precision and accuracy.
Implementation Method 1
The exposure process includes projecting light onto the wafer through a lithography mask having features corresponding to the circuit pattern
Data Source
AI summary
A method of manufacturing a semiconductor device includes generating a mask layout of patterns in which the distance between adjacent ones of the patterns is equal to or less than a resolution of a lithography process, the patterns are apportioned among a plurality of masks such that in each of the masks the space between adjacent ones of the patterns is greater than the resolution, and a dual pattern is added to one of the masks. A semiconductor pattern is formed on a substrate using the mask(s) and the mask to which the dual pattern has been added. Patterns having a pitch equal to or less than the resolution may be formed on the semiconductor device.