Semiconductor Measurement Device Parasitic Capacitance Elimination

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Solution Overview

Problem

Existing semiconductor measurement devices face challenges in accurately measuring capacitance due to difficulties in eliminating parasitic capacitance, which affects the precision of capacitance measurements in semiconductor devices.

Innovation Solution

A semiconductor measurement device and method that utilize a CBCM circuit with a first terminal and an auxiliary terminal, along with a potential difference application circuit, to obtain parasitic capacitance by measuring capacitance in both connected and disconnected states, allowing for accurate calculation of the transistor's capacitance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If conventional capacitance measurement methods are used, then the measurement process is simple, but parasitic capacitance cannot be eliminated and measurement accuracy deteriorates

Engineering Contradiction:

Improvecapacitance measurement accuracyVSAvoidmeasurement system complexity

Core Design Contradiction:

Measurement precisionVSDevice complexity

Solution Approach 1:

The measurement process is segmented into distinct phases: connected state measurement (including parasitic capacitance) and disconnected state measurement (isolating parasitic capacitance). By dividing the measurement into separate steps, the system can mathematically separate the transistor capacitance from parasitic capacitance, improving accuracy without requiring complete system redesign

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The disconnected state measurement is performed as a preliminary action to characterize the parasitic capacitance before the final capacitance calculation. By pre-measuring the parasitic capacitance when the transistor is disconnected, the system can then subtract this value from the connected state measurement to obtain the accurate transistor capacitance

Inventive Principle:

Principle #10Preliminary action

2Measurement precision

If parasitic capacitance is not eliminated, then the measurement system remains simple, but the capacitance measurement accuracy deteriorates

Engineering Contradiction:

Improvecapacitance measurement accuracyVSAvoidmeasurement operation simplicity

Core Design Contradiction:

Measurement precisionVSEase of operation

Solution Approach 1:

The system uses feedback from the disconnected state measurement to correct the connected state measurement. By measuring the parasitic capacitance when disconnected and using this feedback information to adjust the connected state measurement, the system achieves high accuracy while maintaining operational simplicity through automated calculation

Inventive Principle:

Principle #23Feedback

3Ease of operation

If a simple capacitance measurement is performed, then the operation is easy, but parasitic capacitance interferes with the measurement

Engineering Contradiction:

Improvemeasurement operation simplicityVSAvoidparasitic capacitance interference

Core Design Contradiction:

Ease of operationVSObject-affected harmful factors

Solution Approach 1:

The parasitic capacitance, which is normally a harmful interference, is converted into a beneficial measurement parameter. By measuring the parasitic capacitance in the disconnected state, the system uses this previously harmful factor as a correctable value that can be subtracted from the connected state measurement, thereby eliminating its interfering effect

Inventive Principle:

Principle #22Blessing in disguise (Convert harm into benefit)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The proposed solution enhances the accuracy of capacitance measurements in semiconductor devices by effectively eliminating parasitic capacitance, thereby improving measurement precision and reliability.

Implementation Method 1

a potential difference application circuit connected to the auxiliary terminal, the potential difference application circuit having a second terminal and applying a predetermined potential difference with respect to an output of the first terminal

Methodology Applied

Scientific EffectPotential difference: Electric Field

Implementation Method 2

a CBCM circuit having a first terminal and an auxiliary terminal... obtaining the parasitic capacitance of a measurement system from a capacitance in a connected state

Methodology Applied

Scientific EffectCapacitance: Capacitance

Data Source

PatentUS20250155483A1Semiconductor measurement device and semiconductor measurement method

Publication Date: 2025.05.15 RENESAS ELECTRONICS CORP

AI summary

According to an embodiment, a semiconductor measurement device includes a CBCM circuit having a first terminal and a connection terminal and a potential difference application circuit connected to the connection terminal, the potential difference application circuit having a second terminal and applying a predetermined potential difference with respect to an output of the first terminal. The semiconductor measurement device obtains the parasitic capacitance of a measurement system from a capacitance in a connected state in which the first terminal and the second terminal are connected to a transistor and a capacitance in a disconnected state in which the first terminal and the second terminal are disconnected from the transistor, and calculates the capacitance of the transistor.