Semiconductor Device Integrating Memory and Arithmetic Circuits

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Solution Overview

Problem

Current semiconductor devices face challenges in efficiently handling vast amounts of data for artificial intelligence calculations, particularly in reducing data transfer distance and energy consumption between arithmetic devices and memory, while also minimizing data transfer volume and incorporating memory functions within arithmetic devices.

Innovation Solution

A semiconductor device design featuring a memory cell array, sense amplifier circuit, and arithmetic circuit with transistors using metal oxides in channel formation regions, allowing for short data transfer distances, reduced energy consumption, and integration of memory functions within arithmetic circuits, enabling efficient product-sum operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If data is transferred between separate arithmetic devices and memory devices, then data processing capability is improved, but data transfer distance and energy consumption increase

Engineering Contradiction:
Improvedata processing capabilityVSAvoidenergy consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The patent merges the arithmetic circuit and memory cell array into a single integrated device structure. The arithmetic circuit includes multiple circuits that can perform calculations using data stored in the memory cell array without requiring external data transfer, thereby reducing energy consumption while maintaining data processing capability.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The integrated device serves multiple functions by combining both arithmetic operations and data storage within the same device. The memory cell array can be directly accessed by the arithmetic circuits, enabling the device to function as both a processor and a memory system, eliminating the need for separate data transfer operations.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Productivity

If data is transferred between separate arithmetic devices and memory devices, then data processing capability is improved, but data transfer volume increases

Engineering Contradiction:
Improvedata processing capabilityVSAvoiddata transfer volume
Core Design Contradiction:
ProductivityVSQuantity of substance

Solution Approach 1:

By integrating the arithmetic circuit and memory cell array within the same device, the patent eliminates the need for external data transfer interfaces and protocols. Data can be directly accessed and processed within the device, significantly reducing the volume of data that needs to be transferred externally.

Inventive Principle:
Principle #5Merging (Combining)

3Adaptability or versatility

If transistors with metal oxides are used in channel formation regions, then memory functions can be integrated within arithmetic circuits, but device complexity increases

Engineering Contradiction:
Improveintegration of memory functionsVSAvoiddevice complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent uses transistors with metal oxides in channel formation regions for both the arithmetic circuits and memory cell arrays. This homogeneous material approach allows for unified manufacturing processes and simplifies the integration of memory functions within the arithmetic circuits, reducing overall device complexity despite the advanced materials used.

Inventive Principle:
Principle #33Homogeneity

Data Source

PatentUS12002535B2Semiconductor device comprising memory cell array and arithmetic circuit
Publication Date: 2024.06.04 SEMICON ENERGY LAB CO LTD
  • US12002535B2 patent drawing
  • US12002535B2 patent drawing
  • US12002535B2 patent drawing

AI summary

A semiconductor device in which energy required for data transfer between an arithmetic device and a memory is reduced is provided. The semiconductor device includes a peripheral circuit and a memory cell array. The peripheral circuit has a function of a driver circuit and a control circuit for the memory cell array, and an arithmetic function. The peripheral circuit includes a sense amplifier circuit and an arithmetic circuit, and the memory cell array includes a memory cell and a bit line. The sense amplifier circuit has a function of determining whether the bit line is at a high level or a low level, and outputs the result to the arithmetic circuit. The arithmetic circuit has a function of performing a product-sum operation, the result of which is output from the semiconductor device.