Semiconductor Memory Device Blind Program Loop Tracking
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Solution Overview
Problem
Current semiconductor memory devices face inefficiencies in programming operations due to the need for additional latches to count blind program operations, which increases the physical area and manufacturing costs of the read and write circuit.
Innovation Solution
The method involves performing normal and blind program loops on memory cells without requiring separate latches for counting blind program operations, utilizing data patterns stored in page buffers to track the number of blind program loops, thereby reducing the need for additional count latches and minimizing circuit volume and manufacturing costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If separate latches are added to count blind program operations, then the reliability of program operation tracking is improved, but the physical area and manufacturing cost of the read and write circuit increase
Solution Approach 1:
The data latches in page buffers are made to serve dual purposes: storing data patterns for programming operations and counting blind program loop iterations. By reusing existing data latches for counting functionality, the patent eliminates the need for separate count latches, thereby reducing circuit physical area while maintaining reliable tracking of blind program operations through the same latch structures
Solution Approach 2:
The patent combines the data storage function and the counting function into a single latch structure. The data latches that originally only stored data patterns are merged with counting functionality, allowing them to track both the data to be programmed and the number of blind program loops executed, thus eliminating redundant circuit components
2Measurement precision
If separate latches are added to count blind program operations, then the accuracy of program loop counting is improved, but the manufacturing cost of the read and write circuit increases
Solution Approach 1:
The data latches in page buffers are made to serve dual purposes: storing data patterns for programming operations and counting blind program loop iterations. By reusing existing data latches for counting functionality, the patent eliminates the need for separate count latches, thereby reducing circuit physical area while maintaining reliable tracking of blind program operations through the same latch structures
Solution Approach 2:
The patent recovers the unused counting capability within existing data latch structures. Instead of discarding the need for separate count latches, the invention recovers the counting function by repurposing the data latches to also track blind program loop iterations, thereby eliminating redundant components and reducing manufacturing complexity and cost
3Productivity
If verify step is skipped in some program loops to improve program speed, then the productivity of programming operation is improved, but the reliability of program verification is worsened
Solution Approach 1:
The patent performs preliminary verification by checking whether a memory cell requires blind program operation before skipping the verify step. By using data patterns in data latches to determine if a cell needs blind programming, the system proactively identifies which cells can skip verification, allowing verify steps to be skipped for appropriate cells while maintaining verification for others, thus balancing speed improvement with reliability
Solution Approach 2:
The patent implements feedback mechanisms where the state of data latches and the execution status of program loops are continuously monitored. This feedback allows the system to dynamically determine when verify steps can be safely skipped based on the current programming state, ensuring that productivity gains from skipping verification do not compromise the overall reliability of the programming operation
Data Source
AI summary
Provided herein may be a semiconductor memory and a method of operating the same. By the method, at least one normal program loop may be performed on a first memory cell, among a plurality of memory cells included in a page selected as a program target, having an N-th program state, among a plurality of program states, as a target program state, and at least one blind program loop may be performed on the first memory cell. While the at least one blind program loop is being performed, a target data pattern that is stored in a data latch of a first page buffer coupled to the first memory cell and that corresponds to the N-th program state may be changed to a first data pattern corresponding to a first program state that is lower than the N-th program state, and wherein N is a natural number equal to or greater than 2.