Semiconductor Memory Block Counting for Row Hammer Mitigation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional semiconductor devices require a large circuit area for counters to prevent row hammering, which degrades data in memory cells due to frequent activations, necessitating additional refresh operations.
Innovation Solution
A semiconductor device with a counting unit that determines target memory cell blocks for additional refresh operations based on active commands and row addresses, minimizing circuit area while mitigating row hammering through a targeted refresh operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If counters are provided for each row to prevent row hammering, then data integrity is improved, but circuit area increases
Solution Approach 1:
The patent divides the memory structure into multiple memory cell blocks, each with its own counter. This segmentation allows the counting function to be distributed across blocks rather than requiring a counter for every single row, reducing the overall circuit area while maintaining data integrity through block-level monitoring and selective refresh operations.
Solution Approach 2:
The counter unit is designed to serve multiple memory cell blocks universally. A single counter unit can be shared across multiple blocks through control logic that directs the counter to monitor specific blocks based on activation patterns. This multi-functionality reduces the total number of counters needed compared to having dedicated counters for each row, thereby reducing circuit area while maintaining reliability.
2Reliability
If additional refresh operations are performed on target rows, then data loss due to row hammering is prevented, but operation complexity increases
Solution Approach 1:
The patent performs preliminary counting of activation operations on memory cell blocks before data loss occurs. The counter unit continuously monitors and counts activations, identifying target blocks that require refresh before actual data degradation happens. This preliminary action simplifies the refresh operation by pre-identifying targets based on activation history rather than requiring complex real-time analysis.
Solution Approach 2:
The patent implements a feedback mechanism where the counter unit provides information about activation patterns to the refresh control logic. This feedback loop allows the system to automatically identify and refresh target memory cell blocks based on their activation history, reducing operation complexity by using simple count-based criteria rather than complex real-time analysis of memory states.
Data Source
AI summary
A semiconductor device includes: a plurality of memory cell blocks, a counting unit suitable for counting the number of active operations on each of the memory cell blocks, based on an active command and a row address, and a refresh control unit suitable for determining a target memory cell block among the memory cell blocks and controlling an additional refresh operation for the target memory cell block to be performed based on the counting result.