Semiconductor Memory Unit With Simplified Voltage Comparison Circuit

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Solution Overview

Problem

Existing memory circuits face challenges in efficiently discriminating data stored in resistance variable elements due to complex circuit configurations and errors introduced by multiple elements, leading to reduced precision and increased area occupancy.

Innovation Solution

The implementation of a semiconductor memory unit with a simplified circuit configuration, including a resistance variable element, first and second reference resistance elements, and a comparison unit that compares voltages corresponding to these resistance values, eliminating the need for separate reference voltage generation and reducing the number of elements, thereby improving precision and reducing circuit area.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a complex circuit configuration is used to discriminate data stored in resistance variable elements, then data discrimination capability is achieved, but circuit area increases and precision decreases due to errors from multiple elements

Engineering Contradiction:
Improvedata discrimination precisionVSAvoidcircuit configuration complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent extracts and eliminates unnecessary reference voltage generation circuits and intermediate voltage conversion stages from the data discrimination circuit. By directly comparing the resistance variable element's voltage against reference voltages using a simplified comparator, the circuit removes complex processing steps that introduced errors, thereby improving precision while reducing complexity

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent merges the reference voltage generation function directly into the comparator unit itself, eliminating separate reference voltage generation circuits. This integration reduces the total number of circuit elements and connections, minimizing error propagation paths while maintaining accurate data discrimination capability

Inventive Principle:
Principle #5Merging (Combining)

2Measurement precision

If multiple elements are used in the circuit configuration, then data discrimination function is complete, but errors from element variations increase and precision decreases

Engineering Contradiction:
Improvedata discrimination precisionVSAvoiderror sensitivity
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The patent removes intermediate voltage conversion elements and separate reference voltage generation circuits that introduced variation errors. By using a direct comparison approach with minimal circuit elements, the design eliminates multiple error-prone interfaces and reduces sensitivity to element variations, improving overall reliability and precision

Inventive Principle:
Principle #2Taking out (Extraction)

3Device complexity

If a simplified circuit configuration is used, then circuit area is reduced and element errors are minimized, but data discrimination capability must be maintained

Engineering Contradiction:
Improvecircuit configuration simplicityVSAvoiddata discrimination precision
Core Design Contradiction:
Device complexityVSMeasurement precision

Solution Approach 1:

The comparator unit performs both the data discrimination function and the reference voltage comparison function internally without requiring external reference voltage generation circuits. This self-sufficient design maintains accurate data discrimination capability while using minimal circuit elements, achieving both simplicity and precision simultaneously

Inventive Principle:
Principle #25Self-service

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach simplifies the circuit configuration, decreases errors from element variations, and enhances data discrimination precision while reducing the overall circuit area, leading to more efficient and accurate data storage in electronic devices.

Implementation Method 1

a resistance variable element configured to be changed in a resistance value according to a value of data stored therein

Methodology Applied
Scientific EffectResistive switching: Electrical Resistance

Implementation Method 2

a comparison unit configured to receive a voltage corresponding to the resistance value of the resistance variable element... a voltage corresponding to the first resistance value of the first reference resistance element... and a voltage corresponding to the second resistance value of the second reference resistance element

Methodology Applied
Scientific EffectOhm's law: Ohm's Law

Data Source

PatentUS10255974B2Electronic devices having semiconductor magnetic memory units
Publication Date: 2019.04.09 SK HYNIX INC
  • US10255974B2 patent drawing
  • US10255974B2 patent drawing
  • US10255974B2 patent drawing

AI summary

An electronic device comprising a semiconductor memory unit that includes a resistance variable element configured to be changed in a resistance value according to a value of data stored therein; a first reference resistance element having a first resistance value; a second reference resistance element having a second resistance value larger than the first resistance value; and a comparison unit configured to receive a voltage corresponding to the resistance value of the resistance variable element through a first input terminal and a second input terminal thereof, a voltage corresponding to the first resistance value of the first reference resistance element through a third input terminal, and a voltage corresponding to the second resistance value of the second reference resistance element through a fourth input terminal, the comparison unit configured to output a result of comparing inputs to the first input terminal and the second input terminal and inputs to the third input terminal and fourth input terminal.