Semiconductor Memory Control Circuit for Flash Data Accuracy

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Solution Overview

Problem

Flash memory technologies face challenges in improving data input/output speed, operation reliability, and reducing manufacturing costs, particularly due to issues with adjacent interference effects that lead to erroneous data determination and increased failure bits as memory cells miniaturize.

Innovation Solution

The semiconductor memory employs a control circuit that applies a correction read pass voltage to adjacent word lines based on previous reading results, adjusting the threshold voltage of memory cells to reduce interference and enhance data accuracy during writing and reading operations, using a method that prioritizes the allocation of threshold voltages and the order of page writing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If memory cells are miniaturized to increase storage capacity, then storage density is improved, but adjacent interference effects increase causing erroneous data determination

Engineering Contradiction:
Improvestorage capacityVSAvoiddata determination accuracy
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent applies a correction read pass voltage to unselected adjacent word lines before performing the actual read operation on the selected word line. This preliminary action compensates for the adjacent interference effect in advance, preventing erroneous data determination and improving reliability while maintaining high storage capacity through miniaturization.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If conventional read pass voltage is applied to unselected word lines, then writing speed is maintained, but adjacent interference causes erroneous data determination

Engineering Contradiction:
Improvewriting speedVSAvoiddata accuracy
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies different voltages to different word lines based on their selection status and position. Specifically, a correction read pass voltage is applied to unselected adjacent word lines while a different voltage is applied to the selected word line. This localized differentiation eliminates adjacent interference effects while maintaining writing speed.

Inventive Principle:
Principle #3Local quality

3Reliability

If correction read pass voltage is applied to reduce adjacent interference, then data accuracy is improved, but operation complexity increases

Engineering Contradiction:
Improvedata accuracyVSAvoidcontrol circuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent modifies the voltage parameter applied to unselected adjacent word lines by adding a correction component to the conventional read pass voltage. This parameter change compensates for adjacent interference effects and improves data accuracy while using existing control circuitry, thereby avoiding significant increases in operational complexity.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS9390800B2Semiconductor memory and semiconductor memory control method
Publication Date: 2016.07.12 KIOXIA CORP
  • US9390800B2 patent drawing
  • US9390800B2 patent drawing
  • US9390800B2 patent drawing

AI summary

According to one embodiment, a semiconductor memory includes memory cells, word lines connected to gate of memory cells arranged in a row direction, a control circuit which controls the operation of the memory cells. During k-level data writing to a selected cell, the control circuit applies the corrected unselect voltage in accordance with the result of the reading of data from the unselected cell connected to the adjacent word line to the adjacent word line and applies a read voltage to the selected word line to read (k−1)-level data from the selected cell, and the control circuit writes data to the selected cell in accordance with the read (k−1)-level and the k-level data to be written.