Semiconductor Memory Device Double Verify Operation
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Solution Overview
Problem
Conventional semiconductor memory devices face challenges in ensuring reliable programming operations due to the probability of error bits occurring during read operations, necessitating large read margins and inefficient programming verify operations.
Innovation Solution
The implementation of a double verify operation using a first and second verify voltage for each program loop, where the first verify voltage is set to a high voltage of a lower program state and the second verify voltage is used for the main verify operation, allowing for incremental step pulse programming to maintain threshold voltages within a narrow range and prevent over-programming.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a single verify voltage is used for programming verification, then the programming operation is simple, but the probability of error bits increases and reliability deteriorates
Solution Approach 1:
The verify operation is segmented into two distinct stages: a first verify operation using a first verify voltage to determine initial verification results, and a second verify operation using a second verify voltage to determine final verification results. This segmentation allows each verify stage to use optimized voltage levels for specific purposes, improving overall programming reliability while maintaining manageable complexity through systematic division of the verification process.
Solution Approach 2:
The patent applies parameter changes by using different verify voltages for different verification stages. The first verify voltage is used initially to check programming status, and based on the result, a second verify voltage is applied for final verification. This dynamic adjustment of voltage parameters enables more precise control over the verification process, reducing error bits while managing operational complexity.
2Manufacturing precision
If a narrow threshold voltage range is maintained through double verify operation, then programming precision is improved, but the programming process becomes more complex
Solution Approach 1:
The programming process is segmented into multiple loops, each containing program and verify operations. Within each loop, the verify operation is further segmented into first and second verify stages using different voltages. This multi-level segmentation enables precise control over threshold voltage distribution, maintaining narrow voltage ranges through systematic verification while organizing the complex process into manageable, repeating units.
Solution Approach 2:
The double verify operation implements feedback control by using the result of the first verify operation to determine whether to proceed with the second verify operation. If the first verify indicates successful programming, the second verify confirms the threshold voltage is within the desired narrow range. This feedback mechanism ensures manufacturing precision while managing process complexity through conditional execution.
3Reliability
If over-programming is prevented through dual verify operation, then data accuracy is improved, but the programming time increases
Solution Approach 1:
The first verify operation serves as a preliminary check before the second verify operation. By performing the first verify using the first verify voltage first, the system can quickly identify cells that have been successfully programmed and may not require the more time-consuming second verify operation. This preliminary action filters out clearly successful cases, reducing the overall time impact while maintaining data accuracy through the selective application of the second verify.
Solution Approach 2:
The dual verify operation applies different verification quality levels to different cells based on their programming status. Cells that pass the first verify may receive simplified or skipped second verification, while cells that fail the first verify undergo complete dual verification. This local differentiation of verification quality ensures data accuracy for problematic cells while minimizing time overhead for successfully programmed cells.
Data Source
AI summary
A semiconductor memory device may include a plurality of memory cells programmed to have one of first to Nth program states differentiated according to threshold voltages of the memory cells, the method including determining whether there exists over program cells from among memory cells programmed to a N−1th program state, by using a first verify voltage of a Nth program state from among the first to Nth program states; when there exists over program cells, determining whether the number of the over program cells exceeds a reference value; and when the number of over program cells exceeds the reference value, outputting a program fall signal to a controller.