Semiconductor Circuit Memory Drift Compensation
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Solution Overview
Problem
Hardware neural networks face challenges in maintaining accurate memory state signals over time due to variations in data retention, leading to reduced accuracy in deep learning systems.
Innovation Solution
A semiconductor circuit and operating method that calculates a state difference signal between initial and subsequent memory state signals, and uses this difference to compensate for un-compensated output data, thereby improving the accuracy of output signals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If memory circuits are used to store weight values in hardware neural networks, then hardware size and cost are reduced, but memory state signals drift over time leading to reduced accuracy
Solution Approach 1:
The patent applies preliminary action by reading the reference memory state signal S1 at an initial time point before the main computation, and storing it in advance. This pre-read reference value is then used later to compensate for drift in the memory state signal S2, allowing the system to correct accuracy degradation before it significantly impacts the output result.
Solution Approach 2:
The patent implements feedback by calculating the difference between the reference memory state signal S1 and the current memory state signal S2, then using this difference signal to compensate the output data. This closed-loop feedback mechanism continuously corrects for memory drift, maintaining high accuracy over extended operation periods.
2Measurement precision
If memory state signals are read at different time points, then data retention variations occur, but reading at the same time point would require additional reference memory circuits
Solution Approach 1:
The patent applies universality by using a single reference memory array that serves dual purposes: it stores reference weight values for compensation calculations and can be read at different time points (t1 and t2) to provide both initial reference signals and updated reference signals. This multi-functional use of the same hardware structure avoids the need for separate reference memory circuits.
Solution Approach 2:
The patent changes the temporal parameter by reading the reference memory state signal at two different time points (t1 and t2) rather than simultaneously. This time-based parameter change allows the system to capture memory drift characteristics while using the same reference memory array, avoiding additional hardware complexity.
3Reliability
If compensation calculations are performed using difference signals, then output data accuracy is improved, but additional processing steps are required
Solution Approach 1:
The patent merges the compensation calculation with the main matrix multiplication operation. The difference signal between reference and current memory state signals is calculated and then integrated into the output computation as an additional term. This combining of compensation and main computation in a unified processing step reduces overall system complexity compared to separate compensation circuits.
Data Source
AI summary
A semiconductor circuit and an operating method for the same are provided. The method includes the following steps. A memory circuit is operated during a first timing to obtain a first memory state signal S1. The memory circuit is operated during a second timing after the first timing to obtain a second memory state signal S2. A difference between the first memory state signal S1 and the second memory state signal S2 is calculated to obtain a state difference signal SD. A calculating is performed to obtain an un-compensated output data signal OD relative with an input data signal ID and the second memory state signal S2. The state difference signal SD and the un-compensated output data signal OD are calculated to obtain a compensated output data signal OD′.