Semiconductor Memory Device Dual-Buffer Write Operation
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Solution Overview
Problem
Semiconductor memory devices are inefficient due to the discarding of entire units when only a few cells are defective, as existing methods do not effectively manage data input/output operations to ensure stable performance even when repair data is involved.
Innovation Solution
The semiconductor memory device includes a main buffer for initial data storage, a repair operation unit for selectively latching input data, a repair buffer for storing latched data, and a column operation unit for writing data to either main or repair memory cells, ensuring stable data input/output operations by separating the write operation into two periods.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If input data is simultaneously stored in both main buffer and repair buffer during address comparison, then repair functionality is ensured, but operation time margin is reduced
Solution Approach 1:
The write operation is segmented into two distinct periods: a first operation period for storing input data in the main buffer, and a second operation period for storing latched repair data in the repair buffer. This temporal segmentation eliminates the need for simultaneous storage, thereby preserving the operation time margin while ensuring repair functionality through the repair operation unit that selectively latches data during the first period.
2Ease of operation
If address comparison operation is performed to determine main or repair address, then correct data routing is achieved, but operation complexity increases
Solution Approach 1:
The repair operation unit performs preliminary latching of input data during the first operation period based on address comparison results, before the actual write operation in the second period. This preliminary action separates the address comparison and data selection logic from the main write path, simplifying the overall operation sequence while maintaining accurate data routing to either main or repair memory cells.
Data Source
AI summary
Disclosed are a semiconductor memory device and an operation method thereof. The semiconductor memory device includes a main buffer suitable for storing input data during a first operation period of a write operation, a repair operation unit suitable for selectively latching the input data based on whether the input data is used for repair during the first operation period of the write operation; a repair buffer suitable for storing the latched input data during a second operation period subsequent to the first operation period, and a column operation unit suitable for controlling an operation to write the input data stored in the main buffer or the repair buffer in a main memory cell or a repair memory cell during the second operation period of the write operation.