Semiconductor Nonvolatile Memory Cell Programming with Dual Charge Traps

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Semiconductor nonvolatile memory cells with multiple charge traps face challenges in maintaining adequate current windows when storing data with three or more possible values per charge trap, due to process variations and cross-talk issues during programming, leading to unreliable read operations.

Innovation Solution

A method is introduced where charge traps are repeatedly programmed and verified with varying programming voltages, ensuring both traps reach the desired read current levels in the same number of iterations, thereby maintaining a sufficient current window by using higher voltages for data values with lower read current values.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If multiple charge traps are used to store multiple bits per cell, then storage capacity is improved, but current window separation deteriorates due to process variations and cross-talk

Engineering Contradiction:
Improvestorage capacityVSAvoidcurrent window separation
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent applies different programming voltages to different charge traps based on their specific characteristics. Each charge trap receives a customized programming voltage level (first, second, or third voltage) tailored to its threshold voltage characteristics and desired data state, ensuring optimal programming while maintaining adequate current window separation despite process variations

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent dynamically adjusts programming voltage parameters based on the charge trap's characteristics and desired final state. By changing the voltage parameter (selecting from multiple voltage levels) and programming duration, the system achieves precise control over charge injection, enabling reliable multi-level storage while maintaining current window separation

Inventive Principle:
Principle #35Parameter changes

2Measurement precision

If higher programming voltages are used to program charge traps to lower current levels, then programming precision is improved, but cross-talk between adjacent charge traps increases

Engineering Contradiction:
Improveprogramming precisionVSAvoidcross-talk
Core Design Contradiction:
Measurement precisionVSObject-generated harmful factors

Solution Approach 1:

The patent applies higher programming voltages selectively only to the specific charge trap being programmed, while other charge traps in the same memory cell are programmed with lower voltages or held at specific potentials during their programming phases. This localized high-voltage application achieves precise programming of individual traps without causing excessive cross-talk to adjacent traps

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent segments the programming process into distinct phases where different charge traps are programmed alternately or simultaneously with different voltage levels. By dividing the programming operation into separate controllable stages, the system can apply high voltages to one trap while protecting others, reducing cross-talk while maintaining precision

Inventive Principle:
Principle #1Segmentation

3Quantity of substance

If charge traps are programmed to different current levels to store multiple data values, then data storage density is improved, but current window overlap increases due to process variations

Engineering Contradiction:
Improvedata storage densityVSAvoidcurrent window overlap
Core Design Contradiction:
Quantity of substanceVSManufacturing precision

Solution Approach 1:

The patent uses multiple voltage parameters (first, second, and third voltages with different magnitudes) to program charge traps to different target current levels corresponding to different data values. By having discrete voltage levels that create well-separated current windows, the system achieves high storage density while compensating for process variations through voltage adjustment

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent employs a verify operation after programming to check whether the charge trap has reached the desired current level. Based on the verify result, the system determines whether additional programming is needed, ensuring that each charge trap achieves its target current level accurately despite process variations, thereby maintaining clear current window separation

Inventive Principle:
Principle #23Feedback

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach ensures that both charge traps in memory cells are accurately programmed, maintaining adequate current windows and preventing cross-talk effects, thus enhancing the reliability of data read operations.

Implementation Method 1

A known type of semiconductor nonvolatile memory has memory cells with two charge traps, each of which can store bi-level data ('0' or '1')

Methodology Applied
Scientific EffectCharge trapping: Electrical Accumulator

Implementation Method 2

Hot electrons are thereby injected into the charge trap, and the stored data value changes to '0'

Methodology Applied
Scientific EffectHot electron injection: Electron Beam

Implementation Method 3

This generates hot holes in the drain region. The hot holes are injected into the charge trap, where they neutralize the trapped charge, erasing the stored information

Methodology Applied
Scientific EffectHot hole injection: Electron Beam

Data Source

PatentUS7515467B2Method of programming a semiconductor nonvolatile memory cell and memory with multiple charge traps
Publication Date: 2009.04.07 LAPIS SEMICON CO LTD
  • US7515467B2 patent drawing
  • US7515467B2 patent drawing
  • US7515467B2 patent drawing

AI summary

A semiconductor nonvolatile memory has a memory cell array in which each memory cell has a pair of charge traps and each charge trap stores data with at least three possible values. Different data values produce different read current values. To store data, a controller and a voltage supplying unit in the semiconductor nonvolatile memory successively program and verify the charge traps that require programming, using higher programming voltages for data values that must produce lower read currents. This operation is iterated on the charge traps that have not yet attained their necessary read current values, until no such charge traps remain. The programming voltages are set so that all charge traps require substantially the same number of programming iterations, regardless of the data being stored.