Semiconductor Memory Device Dummy Pulse for Data Reliability

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Solution Overview

Problem

Semiconductor memory devices face challenges in maintaining data reliability due to unintended charge injection during program and erase operations, which affects the accuracy of read operations and reduces the reliability of stored data.

Innovation Solution

Applying a dummy pulse to unselected memory blocks after a program or erase operation to discharge unintended charges, thereby improving data reliability without increasing operation time.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If dummy pulse is applied to discharge unintended charges, then data reliability is improved, but operation time may be increased

Engineering Contradiction:
Improvedata reliabilityVSAvoidoperation time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The dummy pulse is applied in advance during the program or erase operation while the status signal indicates ready status, before the actual read operation occurs. This preliminary discharge of unintended charges prevents potential read errors without delaying the read operation, as the charge discharge happens concurrently with other device operations.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The dummy pulse application is integrated into the existing program and erase operations, maintaining continuous useful action. The status signal monitoring ensures the dummy pulse is applied during appropriate time windows without interrupting the main operation flow, thereby improving reliability while maintaining operation speed.

Inventive Principle:
Principle #20Continuity of useful action

2Reliability

If dummy pulse is applied continuously, then charge discharge effectiveness is improved, but power consumption increases

Engineering Contradiction:
Improvecharge discharge effectivenessVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The dummy pulse is applied periodically based on the status signal transitions rather than continuously. The control logic monitors status signal changes and applies dummy pulses at specific intervals when the status signal indicates ready status, ensuring effective charge discharge while minimizing unnecessary power consumption during operation.

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS9424901B1Semiconductor memory device outputting status signal and operating method thereof
Publication Date: 2016.08.23 SK HYNIX INC
  • US9424901B1 patent drawing
  • US9424901B1 patent drawing
  • US9424901B1 patent drawing

AI summary

An operating method of a semiconductor memory device may include receiving a command, outputting a status signal as a busy status while accessing a selected area of the memory cell array in response to the command, changing the status signal from the busy status to a ready status and outputting the status signal after the access is completed, and applying a dummy pulse to an unselected area of the memory cell array in response to the status signal being output as the ready status.