Semiconductor Memory Dummy Transistors for Capacity and Reliability
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current semiconductor memory systems face limitations in increasing memory capacity per block while maintaining manufacturing cost efficiency and data reliability.
Innovation Solution
The semiconductor device incorporates a memory string with memory cells, select transistors, and dummy transistors, where a program voltage is applied to a selected dummy word line, and a first dummy word line voltage is applied to an adjacent select line, enhancing data storage capacity and reducing manufacturing costs by utilizing dummy transistors for data programming.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If dummy transistors are added to memory strings to increase capacity per block, then memory capacity is improved, but device complexity increases
Solution Approach 1:
The dummy transistors are designed to serve dual purposes: they function as regular memory cells for data storage during normal operations, and they serve as dummy cells during erase operations to maintain proper voltage distribution across the memory string. This multi-functionality allows the device to increase capacity without proportionally increasing complexity, as the same structural elements fulfill multiple roles depending on the operational context.
Solution Approach 2:
The memory block is segmented into regular memory cells and dummy memory cells, with the dummy cells strategically positioned at specific locations (e.g., at the beginning or end of memory strings). This segmentation allows the dummy cells to be selectively activated during erase operations while regular cells handle normal data operations, thereby managing complexity through functional division rather than requiring a completely different architecture.
2Ease of manufacture
If more memory cells are packed per block to increase capacity, then manufacturing cost efficiency improves, but reliability of data storage deteriorates
Solution Approach 1:
Dummy memory cells are pre-positioned in the memory block structure to provide voltage cushioning during erase operations. These dummy cells act as buffer elements that prevent excessive voltage drops or spikes that could occur when erasing large numbers of closely-packed memory cells. This beforehand cushioning ensures that even as memory density increases and cells are packed more tightly, the voltage distribution remains stable and data reliability is maintained throughout the high-density array.
3Device complexity
If dummy word lines are reduced to simplify control, then device complexity is improved, but memory capacity deteriorates
Solution Approach 1:
The control circuitry for dummy word lines is merged with the control logic for regular word lines. The same control signals and decoding logic are used to activate both regular and dummy memory cells, eliminating the need for separate control pathways. During erase operations, the control system simply activates the appropriate dummy word lines using the existing control infrastructure, thereby maintaining simplified control architecture while still enabling the use of dummy cells to increase overall memory capacity.
Data Source
AI summary
A semiconductor device includes: a memory string including a plurality of memory cells, a plurality of select transistors, and one or more dummy transistors coupled between the plurality of memory cells and the plurality of select transistors; one or more dummy word lines coupled to the one or more dummy transistors; and a plurality of select lines respectively coupled to the plurality of select transistors. When a program voltage is applied to a selected dummy word line among the one or more dummy word lines, a first dummy word line voltage may be applied to a select line adjacent to the one or more dummy word lines, among the plurality of select lines.