Semiconductor Memory ECC Layering for Charge Leakage Recovery

Solution Overview

Problem

Nonvolatile semiconductor memory devices with laminated gate structures face data loss over time due to charge leakage, leading to errors, and existing high-error correction mechanisms consume excessive power and resources even for short data storage periods, resulting in inefficiency.

Innovation Solution

A semiconductor memory device with multiple error correction code generators: first correcting codes for low-power, small-scale correction of errors in individual data blocks and a second correcting code for high-capability correction of aggregated data blocks, optimizing power use and circuit scale based on error probability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a high-performance error correction mechanism is used to guarantee restoration of correct information after long storage, then error correction capability is improved, but power consumption increases

Engineering Contradiction:

Improveerror correction capabilityVSAvoidpower consumption

Core Design Contradiction:

ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent implements dynamic error correction by selecting between first and second error correction mechanisms based on the actual error rate detected in stored data. The system transitions from static to dynamic operation, adjusting the correction capability according to storage time and error conditions, thereby reducing power consumption when high-capability correction is not needed.

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The system changes the error correction parameter (capability level) based on storage time and detected error rates. For short storage times with low error rates, a low-capability mechanism is used; for long storage times with high error rates, a high-capability mechanism is activated. This parameter adaptation resolves the contradiction between reliability and power consumption.

Inventive Principle:

Principle #35Parameter changes

2Reliability

If a high-performance error correction mechanism is used for all data reads, then error correction capability is improved, but processing time increases

Engineering Contradiction:

Improveerror correction capabilityVSAvoidprocessing time

Core Design Contradiction:

ReliabilityVSLoss of time

Solution Approach 1:

The patent implements dynamic error correction by selecting between first and second error correction mechanisms based on the actual error rate detected in stored data. The system transitions from static to dynamic operation, adjusting the correction capability according to storage time and error conditions, thereby reducing power consumption when high-capability correction is not needed.

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The system changes the error correction parameter (capability level) based on storage time and detected error rates. For short storage times with low error rates, a low-capability mechanism is used; for long storage times with high error rates, a high-capability mechanism is activated. This parameter adaptation resolves the contradiction between reliability and power consumption.

Inventive Principle:

Principle #35Parameter changes

3Reliability

If error correction capability is increased by concatenating multiple data items, then error correction capability is improved, but circuit scale increases

Engineering Contradiction:

Improveerror correction capabilityVSAvoidcircuit scale

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments the error correction function into two independent mechanisms: a first error correction mechanism for individual data items and a second error correction mechanism for concatenated data items. This segmentation allows the system to apply the appropriate level of correction based on needs, avoiding the unnecessary circuit complexity of always having the full-capability mechanism active.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent implements dynamic error correction by selecting between first and second error correction mechanisms based on the actual error rate detected in stored data. The system transitions from static to dynamic operation, adjusting the correction capability according to storage time and error conditions, thereby reducing power consumption when high-capability correction is not needed.

Inventive Principle:

Principle #15Dynamics

Data Source

PatentUS8069394B2Semiconductor memory device and method of controlling the same

Publication Date: 2011.11.29 KIOXIA CORP

AI summary

A semiconductor memory device includes a plurality of detecting code generators configured to generate a plurality of detecting codes to detect errors in a plurality of data items, respectively, a plurality of first correcting code generators configured to generate a plurality of first correcting codes to correct errors in a plurality of first data blocks, respectively, each of the first data blocks containing one of the data items and a corresponding detecting code, a second correcting code generators configured to generate a second correcting code to correct errors in a second data block, the second data block containing the first data blocks, and a semiconductor memory configured to nonvolatilely store the second data block, the first correcting codes, and the second correcting code.