Semiconductor Memory ECC Switching for Short- and Long-Term Data

Solution Overview

Problem

Existing nonvolatile semiconductor memory devices with laminated gate structures face issues with data retention over time, leading to errors, and current high-performance error correction mechanisms are wasteful in power consumption and circuit size, as they are applied uniformly regardless of storage time, even for short-term data.

Innovation Solution

A semiconductor memory device with a dual error correction mechanism, using first error-correcting codes for low power and small circuit size to correct errors in short-term data and a second error-correcting code for high-capability correction in long-term data, optimizing circuit scale and power usage based on storage time.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a high-performance error correction mechanism is applied uniformly to all data regardless of storage time, then error correction capability is improved, but power consumption and circuit size increase unnecessarily

Engineering Contradiction:

Improveerror correction capabilityVSAvoidpower consumption

Core Design Contradiction:

ReliabilityVSUse of energy by stationary object

Solution Approach 1:

The patent implements dynamic error correction by switching between two error correction mechanisms based on storage time. A first error correction mechanism with lower capability is used for short-term data, while a second error correction mechanism with higher capability is used for long-term data. This dynamic adaptation allows the system to maintain high reliability when needed while reducing power consumption and circuit complexity for frequently accessed short-term data.

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The patent changes the error correction parameter (capability level) based on the storage time parameter. By monitoring how long data has been stored, the system adjusts the error correction mechanism applied - using a lighter first mechanism for recent data and a more robust second mechanism for older data. This parameter-based adaptation resolves the contradiction by matching error correction strength to actual data age and risk profile.

Inventive Principle:

Principle #35Parameter changes

2Reliability

If a high-performance error correction mechanism is applied uniformly to all data, then error correction capability is improved, but circuit size increases

Engineering Contradiction:

Improveerror correction capabilityVSAvoidcircuit size

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The patent implements dynamic error correction by switching between two error correction mechanisms based on storage time. A first error correction mechanism with lower capability is used for short-term data, while a second error correction mechanism with higher capability is used for long-term data. This dynamic adaptation allows the system to maintain high reliability when needed while reducing power consumption and circuit complexity for frequently accessed short-term data.

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The patent changes the error correction parameter (capability level) based on the storage time parameter. By monitoring how long data has been stored, the system adjusts the error correction mechanism applied - using a lighter first mechanism for recent data and a more robust second mechanism for older data. This parameter-based adaptation resolves the contradiction by matching error correction strength to actual data age and risk profile.

Inventive Principle:

Principle #35Parameter changes

3Reliability

If error correction capability is increased by reading larger data blocks, then error correction capability is improved, but power consumption increases due to reading more data

Engineering Contradiction:

Improveerror correction capabilityVSAvoidpower consumption

Core Design Contradiction:

ReliabilityVSUse of energy by stationary object

Solution Approach 1:

The patent segments the error correction function into two distinct mechanisms: a first error correction mechanism for handling short-term data with lower error rates, and a second error correction mechanism for handling long-term data with higher error rates. This segmentation allows the system to apply only the necessary correction capability to each data segment based on its age, avoiding the need to always read and process large data blocks for error correction, thereby reducing power consumption while maintaining reliability.

Inventive Principle:

Principle #1Segmentation

Data Source

PatentUS8732544B2Semiconductor memory device and method of controlling the same

Publication Date: 2014.05.20 KIOXIA CORP

AI summary

A semiconductor memory device includes a plurality of detecting code generators configured to generate a plurality of detecting codes to detect errors in a plurality of data items, respectively, a plurality of first correcting code generators configured to generate a plurality of first correcting codes to correct errors in a plurality of first data blocks, respectively, each of the first data blocks containing one of the data items and a corresponding detecting code, a second correcting code generators configured to generate a second correcting code to correct errors in a second data block, the second data block containing the first data blocks, and a semiconductor memory configured to nonvolatilely store the second data block, the first correcting codes, and the second correcting code.