Semiconductor Memory Separation Structure Against Fluorine Erosion

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Solution Overview

Problem

Existing semiconductor memory devices face issues with fluorine gas-induced erosion of oxide films between memory blocks, leading to potential short circuits and interference with adjacent blocks.

Innovation Solution

Incorporation of a first separation region made of a conductor covered with an insulating film to separate memory blocks, preventing fluorine gas erosion and maintaining structural integrity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If memory blocks are separated using only oxide films, then the device structure remains simple, but fluorine gas erosion causes short circuits and interference between adjacent blocks

Engineering Contradiction:
Improveprevention of short circuits between memory blocksVSAvoidstructure of separation regions
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The separation region is constructed as a composite structure combining an oxide film layer and a conductor layer. The oxide film provides dielectric separation while the conductor layer (extending in the first direction) provides structural reinforcement and prevents fluorine gas erosion. This composite approach maintains electrical isolation between memory blocks while preventing the erosion-induced short circuits that occur with oxide films alone.

Inventive Principle:
Principle #40Composite materials

Solution Approach 2:

The separation region is divided into multiple functional layers: an oxide film portion and a conductor layer portion. The conductor layer is segmented to extend specifically in the first direction (parallel to word lines) while the oxide film provides separation in the vertical direction. This segmentation allows each layer to perform its specialized function - the oxide film for electrical isolation and the conductor for structural protection against fluorine gas.

Inventive Principle:
Principle #1Segmentation

2Reliability

If a conductor layer is added to the separation region to prevent fluorine gas erosion, then reliability improves, but manufacturing complexity increases

Engineering Contradiction:
Improveresistance to fluorine gas erosionVSAvoidfabrication of separation regions
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The conductor layer forming process is merged with existing manufacturing steps. The conductor layer is formed to extend in the first direction during the same fabrication sequence used for creating word lines and other conductive structures. This merging allows the separation region to gain enhanced fluorine gas resistance without requiring entirely new manufacturing equipment or processes, thereby limiting the increase in manufacturing complexity.

Inventive Principle:
Principle #5Merging (Combining)

3Strength

If the conductor layer extends fully across the separation region, then structural strength is maximized, but interference with adjacent memory blocks may occur

Engineering Contradiction:
Improvestructural strength of separation regionVSAvoidinterference with adjacent memory blocks
Core Design Contradiction:
StrengthVSObject-affected harmful factors

Solution Approach 1:

The conductor layer is configured with directionally selective extension - it extends in the first direction (parallel to word lines) to provide maximum structural strength where needed for fluorine gas resistance, while its extent in other directions is controlled to prevent interference with adjacent memory blocks. This local optimization of the conductor layer's geometry ensures structural reinforcement is provided precisely where the separation region needs it most, without creating harmful electrical or physical interference with neighboring blocks.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS12457739B2Semiconductor memory device
Publication Date: 2025.10.28 KIOXIA CORP
  • US12457739B2 patent drawing
  • US12457739B2 patent drawing
  • US12457739B2 patent drawing

AI summary

According to an embodiment, a semiconductor memory device includes a first conductive layer and second conductive layers arranged at intervals in a first direction above the first conductive layer. A semiconductor layer extends in the first direction in the second conductive layers to be in contact with the first conductive layer. A charge storage layer is between the semiconductor layer and the second conductive layers. A metal layer extends in the first direction and a second direction above the first conductive layer, and separates the second conductive layers. The device further includes an insulating layer. The insulating layer includes a portion between the metal layer and the first conductive layer and a portion between the metal layer and the second conductive layers.